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I am learning about these hardware clocks and Bus communication.

As per my understanding, if two processors(say ARM and DSP) are to be communicated/data transfer through bus, they need a clock for synchronous access.

In such case, will there be a single clock for both master and slave, or there can be an individual clock for each master and slave, both running at the same Hz?

I am specific to AMBA AHB/AXI. Can somebody help me in understanding this correctly or get some more resources possibly?

artless noise
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user3761125
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  • This isn't a programming question, it's about IC design - it might be more on-topic at [electronics.se]. That said, AFAIK two different clock domains even at the same nominal frequency would probably be considered "asynchronous", and have the associated clock-domain-crossing logic to buffer the signals between them. Note that whilst you might choose to drive everything synchronously from one clock, it's by no means a hard requirement - indeed, in a sufficiently complex system the interconnect itself is likely to have its own clock(s) entirely independent of the master and slave devices. – Notlikethat May 18 '15 at 12:06
  • I'm voting to close this question as off-topic because belongs on http://electronics.stackexchange.com/ – artless noise Oct 20 '15 at 13:07

1 Answers1

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This is the wrong forum for this.

First off in general you do not need clocks depending on the interface, ethernet for example, uarts, etc, etc. The clock can be extracted from the data and/or agree on the same clock and deal with the drift between oscillators (uart).

For amba/axi that is all within the same silicon, the chip vendor if they choose to have an arm and a dsp are building it on the same die and are managing the clocks. that bus does have clocks, absolutely. The problem is solved by basic design, if you have to interface between two busses on the same chip you ... interface between two busses on the same chip.

If you are crossing chips then you are not using amba/axi...

old_timer
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