dpll3_m2_clk rate change failed: -22

Question

I am using linux 2.6.32 kernel on omap3503 processor, which boots up successfully but at boot time it gives me error,

"dpll3_m2_clk rate change failed: -22" in log messages.

This error comes from arch/arm/mach-omap2/io.c file when SDRC clock rate is not able to set.

Here is the code of io.c file.

static int __init _omap2_init_reprogram_sdrc(void)
{
    struct clk *dpll3_m2_ck;
    int v = -EINVAL;
    long rate;

    if (!cpu_is_omap34xx())
        return 0;

    dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
    if (!dpll3_m2_ck)
        return -EINVAL;

    rate = clk_get_rate(dpll3_m2_ck);
    pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
    v = clk_set_rate(dpll3_m2_ck, rate);
    if (v)
        pr_err("dpll3_m2_clk rate change failed: %d\n", v);

    clk_put(dpll3_m2_ck);

    return v;
}


And log messages are as under,

    Clocking rate (Crystal/Core/MPU): 26.0/266/600 MHz
    Reprogramming SDRC clock   
    **dpll3_m2_clk rate change failed: -22**
    GPMC revision 5.0
    IRQ: Found an INTC at 0xfa200000 (revision 4.0) with 96 interrupts

Help me to resolve this issue. Looking forward to hearing from you.

Thanks

dpll3_m2_clk rate change failed: -22

0 Answers0