I am trying to create a 32 bit array with 10 spaces in Verilog. Here is the code:
reg [31:0] internalMemory [0:9];
I then try to assign 32 bit values to different locations inside that register. Here is a code sample:
internalMemory[0] = 32'b00000000001000100001100000100000;
internalMemory[1] = 32'b00000000001000100001100000100001;
When compiling I get the following error:
IR.v:21: syntax error
IR.v:21: error: Invalid module instantiation
That line 21 represents me trying to access internalMemory[1]
.
Any advice as for why this is happening and how to fix it?
Thanks!
UPDATE 1:
As requested here is there code for the Instruction Register I am trying to implement:
`include "IRTester.v"
module instruction_register(IREnable, programCounter, controlUnit, RS, RT, RD, immediate);
parameter dataWidth = 32; //input size
input wire IREnable;
input wire [31:0] programCounter; //instruction to be read
output wire [5:0] controlUnit;
output wire [4:0] RS;
output wire [4:0] RT;
output wire [4:0] RD;
output wire [15:0] immediate;
wire [31:0] temp;
reg [31:0] internalMemory [0:9];
always @ (posedge IREnable)
internalMemory[0] = 32'b00000000001000100001100000100000;
internalMemory[1] = 32'b00000000001000100001100000100001;
assign temp = internalMemory[programCounter];
assign controlUnit = temp[31:26];
assign RS = temp[25:21];
assign RT = temp[20:16];
assign RD = temp[15:11];
assign immediate = temp[15:0];
endmodule