Identifying when to use FSM in verilog

Question

I understand FSM, how they are constructed and implemented in verilog and the different kinds (Mealy vs Moore) but I have a problem in identifying when to actually use a FSM to solve a verilog problem ?? Are there any guidelines ?

Thank you

Answer 1

Complex sequential design are good candidates for FSM. Anything that can be modeled using a datapath and a controller is a work for a FSM too. This implies that almost any hardware implementation of an algorithm can be done with a FSM.

Examples of what can be normally done with a FSM includes:

• Processors and DSP's
• Automatas (the classic examples include calculate correct change in a vending machine, or the behaviour of an elevator)
• Protocol controller (for example SPI, I2C, PS/2, serial, etc)
• Video controllers (in this case, the FSM state is the current value of two counters: the horizontal counter and the vertical counter)
• Actually, any sequential hardware design can be expressed in terms of a FSM. Even a simple counter is a sort of FSM