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Currently llvm's add, sub,... instructions require 3 operands : dest, src1, src2.

How can I write a custom "add" instruction that only supports 2 operands ?
Eg : dest = dest + src1.

I tried this in the .td file, but it didn't work : 

defm Reg: Instr<opcode, (outs RC:$dest), (ins RC:$A),
              !strconcat(opcodeStr, " $dest, $dest, $A"),
              [(set Ty:$dest, (opNode Ty:$dest, Ty:$A))]>;

It complains that "Input operand $dest occurs in pattern but not in operands list!"

Thanks.

Himanshu
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namanhams
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1 Answers1

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You need to model it as 3-operand instruction, but add a constraint that one of source operands equals to destination. See X86 backend as an typical example how to do this.

Anton Korobeynikov
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