2

Is it possible to map two entries with the same virtual address and physical address except that the ASIDs are different?

VividD
  • 10,456
  • 6
  • 64
  • 111
byslexia
  • 329
  • 2
  • 8
  • 1
    Sure, why would it not be? Two processes could be using the same .so mapped to the same virtual address. – markgz Feb 13 '15 at 18:38
  • Thanks! From a software perspective it makes sense. I was not sure if TLB hardware is capable of generating an Index given the same VA. – byslexia Feb 13 '15 at 18:46

1 Answers1

0

http://pages.cs.wisc.edu/~remzi/OSTEP/vm-tlbs.pdf

A Real TLB Entry

Finally, let’s briefly look at a real TLB. This example is from the MIPS R4000 [H93], a modern system that uses software-managed TLBs; a slightly simplified MIPS TLB entry can be seen in Figure 19.4.

The MIPS R4000 supports a 32-bit address space with 4KB pages. Thus, we would expect a 20-bit VPN and 12-bit offset in our typical virtual address. However, as you can see in the TLB, there are only 19 bits for the VPN; as it turns out, user addresses will only come from half the address space (the rest reserved for the kernel) and hence only 19 bits of VPN are needed. The VPN translates to up to a 24-bit physical frame number (PFN), and hence can support systems with up to 64GB of (physical) main memory (2^24 4KB pages).

There are a few other interesting bits in the MIPS TLB. We see a global bit (G), which is used for pages that are globally-shared among processes. Thus, if the global bit is set, the ASID is ignored. We also see the 8-bit ASID, which the OS can use to distinguish between address spaces (as described above). One question for you: what should the OS do if there are more than 256 (2^8) processes running at a time? Finally, we see 3 Coherence (C) bits, which determine how a page is cached by the hardware (a bit beyond the scope of these notes); a dirty bit which is marked when the page has been written to (we’ll see the use of this later); a valid bit which tells the hardware if there is a valid translation present in the entry. There is also a page mask field (not shown), which supports multiple page sizes; we’ll see later why having larger pages might be useful. Finally, some of the 64 bits are unused (shaded gray in the diagram).

Yes, according to an operating system textbook(Operating Systems: Three Easy Pieces), for some MIPS systems (e.g.,e MIPS R4000), they do have this scheme. For example, the global pages from the OS shared between 2 processes meets your description.

SaltedFishLZ
  • 157
  • 1
  • 9