Driving two different sequence items in one interface

Question

Let say I have only one interface and multiple definitions of sequence items:

class link_pkt extends uvm_sequence_item;
class phy_pkt  extends uvm_sequence_item;

During the test, these items can dynamically be transmitted out through that one interface.

What is the proper way to implement the driver/sequencer? Is one driver enough? or more than one drivers are needed?

It seems that because of multiple definitions of sequence items, I will need more than one driver and sequencer. But this is not good, since I can not control/arbitrate the transmission.

There is similar case here which is kind of static - we can not switch the driver on the fly. What I need is that I can dynamically drive those different sequence items within one test/sequence.

You have to give us a bit more background. How can both those item types be transmitted on the same interface? Is it some kind of serial interface where all the bits are packed into a stream and sent out? — Tudor Timi, Feb 10 '15 at 09:56
Yes, the interface is kind of serial interface. The two items are handled by different protocol and translated into a stream bits and sent out. — AldoT, Feb 10 '15 at 10:04
To be exact, in terms of protocol, the `link_pkt` is higher level than the `phys_pkt`. It can be broken into several `phys_pkt`. I need to be able to flexibly sending either items. — AldoT, Feb 10 '15 at 10:12

score 3 · Accepted Answer · answered Feb 10 '15 at 12:35

What you want to look at here is protocol layering. You need to have a sequencer for each protocol sending items downward to each lower layer. At the bottom you'd have your driver that actually drives the DUT signals.

Each sequencer needs to run a translation sequence that converts from higher layer items to its own items:

+-----------+
| link SEQR |   <---- can start items here
+-----------+
      |
      |    link 2 phys
      v
+-----------+
| phys SEQR |   <---- can also start items here
+-----------+
      |
      |
      v
+-----------+
| phys DRV  |
+-----------+

You can start items on both sequencers, which enables you to work at the level of abstraction you choose. The sequencers themselves will take care of prioritization and make sure that only one item is being driven on the phyisical interface.

Here are a few links you can look at to learn more about how to implement layering:

http://verificationhorizons.verificationacademy.com/volume-7_issue-3/articles/stream/layering-in-uvm_vh-v7-i3.pdf

http://www.doulos.com/knowhow/sysverilog/uvm/easier_uvm_guidelines/layering/

I've already have a conversation on the topic here.

Driving two different sequence items in one interface

1 Answers1