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In ARM architecture I have read that there are 3 kinds of interrupt :

  • PPI - Per processor interrupts
  • SPI - Shared processor interrupts
  • SGI - Software generated interrupts

I want to know what are these, and how they are different from each other ?

artless noise
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Saurabh Sengar
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    The terms are actually "Private Peripheral Interrupt" and "Shared Peripheral Interrupt", and they're pretty much exactly what the names say they are - i.e. some interrupts come from peripherals that are private to each processor (e.g. local timers), some come from peripherals that are shared between processors (e.g. general system stuff like network/USB/etc.), and some can be triggered directly by software (e.g. for inter-processor signalling). Beyond that, there isn't really room to start explaining [the entire GIC spec](http://infocenter.arm.com/help/topic/com.arm.doc.ihi0048b/index.html)... – Notlikethat Dec 30 '14 at 17:50
  • thank you, your comment is helpful – Saurabh Sengar Dec 30 '14 at 17:59
  • You can also read [tag:arm+gic](http://stackoverflow.com/search?q=[arm]+gic) questions which have many explanation of these terms as part of other questions. – artless noise Dec 30 '14 at 22:55
  • possible duplicate of [How SMP schedule work in Linux kernel? (ARM architecture)](http://stackoverflow.com/questions/21182160/how-smp-schedule-work-in-linux-kernel-arm-architecture) – artless noise Dec 30 '14 at 22:56

1 Answers1

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Software Generated Interrupt (SGI) This interrupt is generated explicitly by software by writing to a dedicated distributor register, the Software Generated Interrupt Register. It is most commonly used for inter-core communication. SGIs can be targeted at all, or at a selected group of cores in the system. Interrupt numbers 0-15 are reserved for this. The software manages the exact interrupt number used for communication.

Private Peripheral Interrupt (PPI) This interrupt is generated by a peripheral that is private to an individual core. Interrupt numbers 16-31 are reserved for this. PPIs identify interrupt sources private to the core, and are independent of the same source on another core, for example, per-core timer.

Shared Peripheral Interrupt (SPI) This interrupt is generated by a peripheral that the Interrupt Controller can route to more than one core. Interrupt numbers 32-1020 are used for this. SPIs are used to signal interrupts from various peripherals accessible across the whole system.

You can read here

sramij
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