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Could someone help me clarify the following conecpts, and the relationship among them?

  • Maskable interrupt
  • Unmaskable interrupt
  • Hardware interrupt
  • Software interrupt
  • CPU INTR pin
  • the IF bit of EFlags register

Some specific questions:

  • What's the relationship between Maskable/Unmaskable interrupt and Hardware/Software interrupt?
  • What's the relationship between maskability and being software/hardware?
  • Is there any unmaskable/software interrupt and maskable/hardware interrupt?
  • What kind of interrupts does INTR pin detect?
  • What kind of interrupts are enabled/disabled by IF bit of EFlags register?
  • What kind of interrupts need the presence of an interrupt controller?

Many thanks.

Sam
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smwikipedia
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1 Answers1

5

Interrupts

Maskable: Can be enabled/disabled by setting the proper bit.

  • Non-Maskable: Can NOT be enabled/disabled. (no designated bit).

  • Hardware: RST, INTR etc. Whenevr the h/w pin is activated properly h/w INTERRUPT occurs.

  • Software: An Interrupt raised by using the INTERRUPT software instruction.

  • INTR pin is Interrupt receive pin.

  • All interrupts are handled by the "Interrupt-handler" i.e. Interrupt service routine (ISR). An ISR is a function written, that is executed when an interrupt occurs.

  • IF (bit 9) Interrupt enable flag : Controls the response of the processor to maskable interrupt requests. Set to respond/enable to maskable interrupts; cleared to inhibit/disable maskable interrupts.

A lot more Q & A info here:

For a detailed explanation. Plz refer the book Microprocessor x86 by Barry B Brey

GoodLuck!!

TheCodeArtist
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