The number symbol in Verilog

Question

Can anyone please tell me what is the meaning of "#" sign in Verilog?

For instance:

counter <= #1 counterNext;

Possible duplicate of [#(…) pound mean in Verilog?](http://stackoverflow.com/q/16022898/97073) — Morgan, Oct 30 '14 at 15:11

score 1 · Answer 1 · edited Oct 30 '14 at 15:21

1

# is for a delay. #1 adds a delay of one time unit. This is defined in the free IEEE Std 1800-2012 document in the "Procedural timing controls" section.

edited Oct 30 '14 at 15:21

Greg

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answered Oct 30 '14 at 00:05

toolic

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The number symbol in Verilog

1 Answers1