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So I have a task to write some pseudo code to program a frequency synthesizer. There are three main ports to this that I will utilize, 'Enable', 'Data', and 'Clock'.

The device is initially off, and when enable (active low) is triggered, the clock will cycle (after some minimum setup time). Aside from the delays, I will have a function SendCommand(uint32_t addr, uint16_t data).

The issue that I am having, is that in the specifications given to me, the data is "READ" on a falling clock edge. This means that the data is read into the register at the address defined in the parameter, one bit at a time, and is kept on reading until the entire 16-bit word has been written to the register. The clock cycles at about 10MHz. My questions are:

-How can I simulate the clock to cycle at 10MHz (100 ns/cycle)?

-How can I perform the "data reading" on the falling edge of said clock.

For now ignore the writing aspect of the program, it is still just pseudo-code.

G Boggs
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  • You should probably start with writing, not reading. But it sounds like you have something similar to "Serial Peripheral Interface" or "SPI". To do this at a 10MHz clock rate, you likely need a hardware SPI engine as found in many microcontrollers - if your system does not have one, you can use a remote microcontroller which does as a delegate. But if you do not need high performance, most (though not all) such devices will accept data at a much lower clock rate. "Bit-banging" individual signals in software is a common technique if you have a real (non-USB) parallel interface available. – Chris Stratton Oct 07 '14 at 21:10

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Frequency synthesizer chips typically use an SPI interface without a MISO line (i.e. write-only SPI). SPI is a synchronous communications interface, so that the clock frequency is not critical; a bit will be shifted in on (in this case) the falling edge of the CLOCK signal, but it does not matter when that edge occurs - the receiver will wait indefinitely - it need not even be fixed.

The 10MHz specification will simply be the maximum frequency supported, or more accurately it reflects the minimum period between falling edges of the clock line, being 1/10x106 or 100ns. You would be hard pushed to maintain that rate consistently implementing the SPI in software. Most microcontrollers include SPI hardware to automate the output of SPI signals. The question What are the disadvantages of bit banging SPI/I2C in embedded applications may be of sole interest. Here is an example of a software SPI implementation - you need only the write function, not the read, and you might extend it to 16 bits, though you could equally send two bytes.

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Clifford
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