I was trying to genrating verilog for the below program but it's throwing AssertionError. Is the corresponding verilog unroll "io.opcode := io.a + io.b" statement 5 times ? it would be very helpful if someone can tell how for loop is working.
val io = new Bundle {
val a = UInt(INPUT, 2)
val b = UInt(INPUT, 2)
val opcode = UInt(INPUT, 2)
val output = UInt(OUTPUT, 2)
}
for(j <- 0 to 4){
io.opcode := io.a + io.b
}
io.output := io.opcode