What is the distinction between Output Compare and Pulse-Width Modulation functions?

Question

I am brushing up on microcontrollers, using the STM32 series. (Specifically using the STM32F072BDISCOVERY board).

I am having some trouble understanding the use of timers and their various modes. Specifically, there are a lot of options for "Output Compare" (OC) modes, and other options for "PWM" modes. The RM0091 Reference manual is written as if they are two distinct, alternate modes of operation. I am working with the new HAL drivers as well, and there are different APIs to use OC vs PWM.

However, it looks to me like PWM is basically a subset/use case of the Output Compare capability, where the timer channel is configured to directly drive a hardware output.

Is there a firm distinction between OC and PWM modes that I am missing? In what way is PWM waveform generation not an Output Compare function?

Answer 1

The question is old but I was wondering the same and started digging into the topic.

In an STM32 micro, not all timers implement every function. My post is based on the STM32F030 Timer 1, which is I believe the most feature packed 4 channel implementation (or at least it was a few years ago).

The timer basically acts as a counter, with various options to where the counter clock comes from, what resets it, what the period is and the counter direction. This is the base for all extra features it implements, the HAL driver refers to it as Time Base. By itself, the counter function is not related to the timer channels.

There are 1-6 channels implemented in STM32 timers. These channels can be configured either independently, or in some case, in pairs (for functions like quadrature encoder mode). A channel can be configured as either input capture, or output compare. The input capture "listens to" some event and saves the counter of the time base in the CCRx registers. The output compare compares the counter register to a set value, given in the CCRx registers.

All the simple IC/OC modes and the extra functions, like PWM input, output, Hall effect sensor interfacing, are built on top of these two modes, their respective option bits act on the various input/output multiplexers and, regarding to OC mode basically tell the hardware what action to take based on the comparator outputs (CNT = CCRx, CNT > CCRx). In this case, PWM mode lets the output mode controller return to the CNT <= CCRx state when the counter register resets (more specifically, the update event), where as in the other OC modes the output mode controller ignores this signal and can be reset by hand, or by an external signal. The output signal is the OCxREF signal which then passes through some more hardware before it gets to the output pins. If it gets output at all, because you are allowed to not connect the timer to the output pins.

The STM32 timers are complicated. They have many logical blocks and a ton of configuration registers/bits so I may have missed something or completely misread something. Please feel free to correct me.

Answer 2

output compare can only make 50% duty cycles (if in toggle mode) PWM can make different duty cycles as it is a combination with a timer interrupt and output compare

Answer 3

PWM is a function of the Output Compare function.

In an AVR microcontroller the distinction can be inferred from the description of the Modes of Operation for each of the Timer/Counters:

The mode of operation, that is, the behavior of the Timer/Counter and the Output Compare pins, is defined by the combination of the Waveform Generation mode (WGMn3:0) and Compare Output mode (COMnx1:0) bits.

The Compare Output mode bits do not affect the counting sequence, while the Waveform Generation mode bits do. The COMnx1:0 bits control whether the PWM output generated should be inverted or not (inverted or non-inverted PWM). For non-PWM modes the COMnx1:0 bits control whether the output should be set, cleared or toggle at a compare match

Earlier in the description of the Output Compare units:

The comparator continuously compares TCNTn with the Output Compare Register (OCRnx). If TCNT equals OCRnx the comparator signals a match. A match will set the Output Compare Flag (OCFnx) at the next timer clock cycle. ... The Waveform Generator uses the match signal to generate an output according to operating mode set by the Waveform Generation mode (WGMn3:0) bits and Compare Output mode (COMnx1:0) bits.

Here is another difference noted in the same section:

The OCRnx Register is double buffered when using any of the twelve Pulse Width Modulation (PWM) modes. For the Normal, and Clear Timer on Compare (CTC) modes of operation, the double buffering is disabled. The double buffering synchronizes the update of the OCRnx Compare Register [which] prevents the occurrence of odd-length, non-symmetrical PWM pulses, thereby making the output glitch-free.

Answer 4

PWM modes: Output changes continually based on comparison of counter value and compare register.
-PWM mode 1: (110) if TIMx_CNT < TIMx_CCR1 output is LOW else HIGH
-PWM mode 2: (111) if TIMx_CNT < TIMx_CCR1 output is HIGH else LOW

Output pin state changes two times for one update event, first when CNT == CCR and second when ARR overflows (update event) and is set to back zero (in upcounting). Setting the ARR controls period and setting CCR controls the duty cycle.

OC modes: Output is only changed when counter is equal to compare register
-Toggle on match: (011)
-Set active (high) on match: (001)
-Set inactive (low) on match: (010)

Output pin state changes only when CNT == CCR. The overflow event does not change the pin state.


You can technically generate PWM by using OC mode, but it very impractical. OC mode is more suitable for generating various shape pulses other than PWM.
There is only one "output" block of the timer which can be configured to both modes. There is a lot of other settings (polarity, deadtime, output disconnect) you can find in Reference Manual.

Hint: Let Cube MX and HAL do the dirty work of configuring the timer clock tree and pin assignments (function like MX_TIM8_Init()). Than control the timer and do what you want by directly setting the bits in the timer control registers. It is easier and faster to understand how to work with timer by reading few reference manual pages than trying to understand multiple layers of HAL functions and Cube MX settings. Moreover, you may need to change setting of the timer during the program run, like reconfigure from PWM to OC mode, or generate only one pulse some times.

Answer 5

I find it very helpful to look into the TIMx_CCMR register to understand the hierarchy of the various modes of the timer.

As mentioned by @Buga, all modes are based on input capture or output compare. With F091 as an example, the CCxS (Capture/Compare x selction) bits in the TIMx_CCMR register controls if the channel is input or output. The wording starts to be a bit confusing here because when the timer is configured as output with CCxS, it is considered to be running in output compare mode.

When configured as output, OCxM (Output compare x mode) bits are used to select the specific output mode. And as mentioned by @Michal, OCxM can be e.g.:

• 001: OC mode, set channel x to active level on match
• 010: OC mode, Set channel x to inactive level on match
• 011: OC mode, toggle channel x on match
• 110: PWM mode 1
• 111: PWM mode 2

There are also the modes of 100 and 101 where the level is forced to be inactive or active. Mode 000 is where no output is not changed.

So in general we have:

• Input capture mode
  • Different variants..
• Output compare mode
  • Frozen Mode 000
  • OC Mode 001/010/011
  • Forced Mode 100/101
  • PWM Mode 110/111

As you can see, OC mode are used both as a parent and as children. I think this is where a lot of confusions originate. What is very clear is that PWM modes (110/111) are certainly not implemented in the software/HAL as subset/special case of OC Modes (001/010/011). They are parallel modes implemented in hardware and they all belong to the parent output compare mode.