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I am new to virtualization and trying to understand basic idea behind the instuction set emulation.

I am following the e500 core instruction set emulation .

http://www.linux-kvm.org/page/E500_virtual_CPU_specification

This particular "kvmppc_core_emulate_mtspr()" in kernel code is emulating the mtspr instruction of powerpc core.

Would want to know what exactly we are doing inside this function to emulate mtspr and why only two instructions(mtspr and mfspr) are emulated as per e500_emulate.c

Amit Singh Tomar
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Hardware-assisted virtualization is the art of executing as many of the instructions of the target program directly, without emulation. A processor that supports hardware-assisted virtualization is designed so that only a few privileged instructions cannot be executed directly. Since the processor is executing the target code directly, when one of these instructions appears, it has to have a mechanism to transfer control back to the hypervisor, which may want to emulate in software the effects the privileged instruction is supposed to have, so as to make it look to the target program that it is being executed directly. This is how running an unmodified OS that was not designed for this inside an hypervisor can be achieved.

Only two instructions are emulated because only these two need to be. The others are executed directly and at full speed by the processor, without emulation.

Pascal Cuoq
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  • Thanks Pascal for quick response,it helped.Couple of follow up queries,how do we decide which all particular instruction needs to be emulated and also to be very specific how we know that a particular powerpc core provides Hardware-assisted virtualization?Also if I understood it correctly whenever guest excutes these privileged emulated instruction control is transfered back to Hypervisor running on host? – Amit Singh Tomar Aug 23 '14 at 14:32
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    @AmitSinghTomar For the first question, instructions that need to be emulated try for instance to access the hardware, so that the hypervisor must step in and simulate that hardware. Or the instruction may order the MMU to change the mapping between physical and logical addresses and the hypervisor may answer “okay, the mapping was changed, as far as you know” while only the target code's view of it. I am surprised you only found two emulated instructions, actually. For the second question, I do not know enough about PowerPC: you should perhaps ask as a new question. – Pascal Cuoq Aug 23 '14 at 14:33
  • Ok @Pascal,Answer to my first question I found bit tricky for me to understand,may be because of my limited understanding on this subject.If it is not taking much of your time ,would it possible for you to give me any example with respect to any architecture? – Amit Singh Tomar Aug 23 '14 at 14:50
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    @AmitSinghTomar it should become much clearer if you compare instruction emulator from the [Cross platform Bochs IA-32 Emulator open source project](http://bochs.sourceforge.net/) which emulates **all** instructions and compare it with source codes from [Multi platform Virtual Box open source project](https://www.virtualbox.org/) which emulates only **some** and uses the hardware acceleration where possible – xmojmr Aug 24 '14 at 06:41