0

I m new in Verilog and I would like to know your opinion about an error I get when trying to synthesize the part of my code cited below:

input [31:0] A;
reg [31:0] X,Y;
reg [15:0] width;
input action;       

always@*
begin

  width= A [31:16]; 
  if (action==1)    
  begin    
    case (width) 
      16'b0: X=0;
        default: 
          begin
            for (i=32; i>=width+1 ; i=i-1)
              X[i]=0;
            for (i=width; i>=0; i=i-1)
              X[i]=1;
          end 
    endcase 
    Y=X >> 1;
  end
end

I m using Cadence synthesis tool and the error that i get is in this part of my code saying :

Index 'X[-1]' is not within the valid range of the declaration [31:0]

which i don't understand because even if width=0 i have a special case that should not involve the for loop. i also tried increasing the limits to width +2,width +1 and then shift the quantity X by 2 ..but also got the same error.

Thank you in advance!

Qiu
  • 5,651
  • 10
  • 49
  • 56
marsia
  • 3
  • 2

2 Answers2

1

I don't see how i could be -1, but it is possible for it to be greater than 31 which is out of range. There are couple of synthesis issues:

  1. i=32 is already out of range for X[31:0]. Its MSB is 31.
  2. i will go out of range when width > 31. width is a 16-bit unsigned value, meaning its maximum value is 65535 (i.e. 216-1) and its minimum is 0.
  3. Synthesis requires loops to static unroll. This means the number of loops must be constant. Variables such as width cannot be in the loops condition.

A synthesis-able for loop will look as follows:

for (i=31; i>=0; i=i-1)
  X[i] = (width>=i);

I'm assuming the width= A [31:16]; above the always block is a copy past typo as it is illegal syntax. I'm also assuming there are no additional assignments on width, X, Y, or i outside of the always block. Otherwise there are additional errors.

Greg
  • 18,111
  • 5
  • 46
  • 68
  • I do not think `for (i=width; i>=0; i=i-1)` can be statically unrolled which I would have thought also caused synthesis issues. – Morgan Aug 11 '14 at 17:33
  • Thank you for the contribution! The first mistake was mine when I was altering the code. I was also thinking the upper limit that should be a problem but the error message was misleading. – marsia Aug 12 '14 at 07:53
0

It's unclear exactly why you're hitting the -1 condition, but it looks like you are trying to create a mask of width "width", which would be more easily accomplished as:

always @*
  begin
    X = ((1 << width[4:0]) - 1)
  end

Edit: Added width specifier to shift, this may reduce synthesis area

Guy
  • 167
  • 9
  • Thank you a lot! I also have thought of that but it synthesized into a "monster" along with the rest of the design.. even worse than X=2**width-1 .I m just trying to explore the possibilities to optimize my design in terms of area. – marsia Aug 12 '14 at 07:52