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I'm trying to port a rather big testbench from VCS to QuestaSim, and while everything works in VCS, there are some problems when porting it. The latest error I get when running vsim is $sscanf: Invalid format specifier '.

It fails at two places in the code, which are very much alike:

information = $sscanf(values0[i], "%2s%2s%2s%2s %", stringName[3], stringName[2], stringName[1], stringName[0]);


information = $sscanf(values0[i], "%2s%2s%2s%2s", stringName[3], stringName[2], stringName[1], stringName[0]);

So this code gives me two errors: $sscanf : Invalid format specifier ' at the lines you can see in the code above.

toolic
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trippelganger
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  • `...%2s%2s %"` is the trailing `%` deliberate? – Chiggs Jul 28 '14 at 14:03
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    The trailing `%` should be `%%` if you want to match a percent sign character. See [IEEE 1800-2012](http://standards.ieee.org/getieee/1800/download/1800-2012.pdf) _Table 21-1_ – Greg Jul 28 '14 at 16:21
  • Thanks, that fixed the compiling part. Now I just have to get it to simulate...! If you can post what you said as an answer, I can mark it as solution. – trippelganger Jul 29 '14 at 07:13

1 Answers1

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As Greg said in the comments:

The trailing % should be %% if you want to match a percent sign character. See IEEE 1800-2012 Table 21-1

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trippelganger
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