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I'm trying to interface a Nexys3 board with a VmodTFT via a VHDCI connector. I am pretty new to FPGA design, and although I have experience with micro-controllers. I am trying to approach the whole problem as a FSM. However, I've been stuck on this for quite some time now. What signals constitute my power up sequence? When do I start sampling data? I've looked at the relevant datasheets and they don't make things very clearer. Any help would be greatly appreciated (P.S : I use Verilog for the design).

EDIT: Sorry for the vagueness of my question. Here's specifically what I am looking at.

For starters, I am going to overlook the touch module. I want to look at the whole setup as a FSM. I am assuming the following states: 1. Setup connection or handshake signals 2. Switch on the LCD 3. Receive pixel data 4. Display video 5. Power off the LCD

Would this be a reasonable FSM? My main concerns are with interpreting the signals. Table 5 in the VmodTFT_rm manual shows a list of signals; however, I am having trouble understanding what signals are for what (This is my first time with display modules). I am going to assume everything prefixed with TFT_ is for the display and everything with TP_ is for the touch panel (Please correct me if I'm wrong). So what signals would I be changing in each state and what would act as inputs? Now what changes should I make to accommodate the touch panel too?

I understand I am probably asking for too much, but I would greatly appreciate a push in the right direction as I am pretty stuck with this for a long time.

Manu
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Your question could be filled out a little better, it's not clear exactly what's giving you trouble.

I see two relevant docs online (you may have seen these):

The user guide explains what signals are part of the Power up sequence

  1. you must wait between 0.5ms and 100ms after driving TFT-EN before you can drive DE and the pixel bus
  2. You must wait 0 to 200ms after setting up valid pixel data to enable the display (with DISP)
  3. You must wait 160ms after enabling DISP before you start pulsing LED-EN (PWM controls the backlight)

Admittedly the documentation doesn't look great and some of the signals names are not consistent, but I think you can figure it out from there.

After looking at the user guide to understand what the signals do, look at the schematic to find the mapping between the signal names and the VHDCI pinout. Then when you connect the VHDCI pinout to your FPGA, look at your FPGA's manual to find mapping between pins on the VHDCI connector and balls of the FPGA, and then you can use the fpga's configuration settings to map an FPGA ball to a logical verilog input to your top module.

Hope that clears things up a bit, but please clarify your question about what you don't understand.

Tim
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  • Thank you, this actually clears up certain things for me. I guess I just needed to think about it properly rather than trying to implement the manual as is. Further, does this mean TFT_EN would be the first signal I set up? – Manu Jul 04 '14 at 04:21