1

Hi I have been looking online all over and my book just doesn't explain enough regarding how the load instructions work for Sparc assembly. 

ldsb - load signed byte
ldub - load unsigned byte
ldsh - load signed half word
Lduh - load unsigned half word 
Ld - load word
Ldd - load double

I also know a byte is 8 bits and that is 2 hex digits, half is 16 bits, and word is 32 bits.

So looking at this example with the solutions below can someone explain how to arrive to do that answer. The first column is Address(decimal) and the second column is Data(hex)

300.  78
301.  56
302.  34 
303.  12
304.  9a
305.  00
306.  'H'
307.  'e'
308.  'l'
309.  'l'
310.  'o' 


Ex. ld[%o1], %o0 %o1 = 0x12345678
Ex2. Ldub[%o0+7], %o2 %o2 = 'e'
Ex3. Ldsh[%o0+3], %o3 Error
Ex4. Ldsh[%o0+4], %o4 %o4 = 0x9a
Ex5. Ldsb[%o0+4], %o5 %o5 = ffffff9a

I just need help explaining why so I can understand this concept. Thanks

Himanshu
  • 4,327
  • 16
  • 31
  • 39
user3591803
  • 11
  • 2

1 Answers1

2

If your book really doesn't explain this then maybe you should look for other resources, like The SPARC Architecture Manual.

To arrive at the results given in the question requires a few assumptions that weren't mentioned in your question: the first is that the value of o0 is 300, and the second is that data is accessed in a little-endian byte order.

Example 1: should be obvious (except that it contains a typo; it should most likely read ld [%o0], %o1): the four bytes 0x78, 0x56, 0x34, 0x12 are loaded into o1. In a little-endian layout the least significant byte is located at the lowest address and the most significant byte at the highest address, so those four bytes become 0x12345678.

Example 2: The byte at address 307 (i.e. 'e') is zero-extended (the three most significant bytes are cleared) and placed in o2.

Example 3: Data must be aligned on their natural boundaries. The address 303 is not halfword-aligned, so the result would probably be a memory_address_not_aligned trap.

Example 4: The halfword 0x009a is sign-extended into 0x0000009a (bit 15 is copied into all of the 16 most significant bits) and placed in o4. Leading zeroes are irrelevant, so 0x0000009a is the same as 0x9a.

Example 5: The byte 0x9a is sign-extended into 0xffffff9a (bit 7 is copied into all of the 24 most significant bits) and placed in o5.

Michael
  • 57,169
  • 9
  • 80
  • 125
  • I always thaught that the byte order for Sparc systems is always big-endian. Are there little endian Sparc variants (just like MIPS that can be configured as little or big endian)? – Martin Rosenau May 02 '14 at 12:05
  • Supposedly SPARC is _bi_-endian (can be either LE or BE) starting with v9. The last time I used, or wrote code for, a SPARC machine was nearly 10 years ago, so that feature is not something I can recall having used myself. It seemed relevant to point out that certain assumptions were necessary in order to answer the question. – Michael May 02 '14 at 12:27