1

I am quiet new to VHDL, so i am having trouble with this issue.

A section of my program is to measure the time it takes for a capacitor to charge, and then see which range the charge time falls under. What i want to see is if count falls under the range H43044 - H 43238 or H8c424 - H8c618

if ((count >= x"43044") and (count <= x"43238"))then
    d3 <= '1'; --enable output
elsif ((count >= x"8c424") and (count <= x"8c618"))  then
    d4 <= '1';
end if;

i made sure the count falls under one of these statement, but i get no output at all. I wonder if this is the right way to approach this problem.

Bill Lynch
  • 80,138
  • 16
  • 128
  • 173
EcEng
  • 23
  • 2
  • 7
  • I have tried to use OR instead of and , it gives me an output but not what i need. – EcEng Apr 05 '14 at 13:50
  • Then either there is something wrong outside this fragment, or count is not entering either of these narrow ranges anytime this fragment is executed. –  Apr 05 '14 at 15:28
  • Hard to say without more code. What is the type of count? What packages do you have visible? Based on what is implied in the code, my expectations are that you already have a math package visible that supports ">=" for the signal count, but if you don't that would explain things. – Jim Lewis Apr 05 '14 at 17:49
  • Could you show us the declaration of `count` ? – shrm Apr 05 '14 at 19:50
  • Thanks for the reply every one,the problem was as Brian said, my test timing was completely missing the window. to be clear, the range was calculated with a clock period of 20ns, but i was using 2ns test bench, hence all count was missing the range. – EcEng Apr 06 '14 at 06:45

1 Answers1

1

Just to close this question, turns out i was using wrong clock in my test bench, i presumed my error was in the way i presented the logic in above segment, because all other code worked just fine. now i know that is the correct method to check range. thanks every one.

EcEng
  • 23
  • 2
  • 7