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I am porting a project to the Freescale TWR-K60F120M development board and a Kinetis K60 32-bit ARM® Cortex™-M4 MCU. While manipulating assembly code, I came accross a function that saves a Task context in specific registers.

Does anyone know in which registers the Task context is saved when an interruption occurs for thumb2 ( Cortex™-M4 instruction set) ?

Thanks.

Zohra-tl
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    You should provide more context. Which OS, or baremetal? There is a free book titled cortex a series programmer's guide from arm. That might provide you some insight. – auselen Apr 04 '14 at 16:37

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The arm architetural refernce documents are quite clear on how this works. You need to refer to the documents for the core you are using for specific details in case there are differences. The cortex-m vs non-cortex-m are definitely quite different. the non-cortex-m (cortex-a, arm11, etc) have pseudo code in the documentation for each handler and I believe that they switch to arm mode. The only processors with arm mode and thumb2 are the most recent cortex-a's. so if you are asking what is the difference between a cortex-m and non-cortex-m. again that is well documented in the arm docs, but:

the cortex-m is designed for not needing to have assembly language wrappers (or compiler specific directives that generate that additional assembly) in order to protect gprs and return with the right instruction. The cortex-m does that in hardware and is designed to be able to have the address of a C function right in the interrupt vector table. The non-cortex-ms generally dont support thumb2, but when in thumb mode or arm mode I believe they switch to arm mode for the handler which you can switch back of course. You have separate stacks on a non cortex-m and you have banked registers. so depending on the interrupt and your handler you may need to preserve more interrupts, and you certainly cannot simply return with bx lr you have to use the proper return instruction based on the exception.

also the cortex-m uses a list of addresses in the vector table, where a traditional arm uses a list of instructions (usually you need to use branch b or ldr pc to get out of the table in one instruction).

old_timer
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  • I am actually working on an oil template for Trampoline OS. The existing template is written for the instruction set ARM and I need to change it to be suitable for thumb2. The template is very specific, it generates a data structure in which the address of the registers where the context of a task is saved, so I need to know the difference between these two instruction sets, if there is any, to change (or keep) the template. – Zohra-tl Apr 05 '14 at 17:34
  • infocenter.arm.com get one/some architectural reference manuals and technical reference manuals. ARMv8 is a do over so dont look there, look at the ARMv7 (cortex-a/r) it will include instruction set and architectural info for that architecture as well as each instruction tells you which architecture supports that instruction or not. the armv7m cortex-m, is thumb/thumb2 only and will tell you which architectures support each instruction as well. – old_timer Apr 05 '14 at 17:55