Deciphering Device Tree

Question

Here is an excerpt I pulled from a device tree on my embedded Linux Kernel. This is how I understand it now:

1) The aemif interface is located at physical address 0x30000000

2) The aemif driver is located in a file called davinci_aemif.c and it uses a clock called aemif

3) The aemif has 2 devices on it, one being cs2 and the other being nand (I don't think this assumption is correct)

Now for the Questions:

1) What is the line reg = <0x21000a00 0x100>; doing? How can the aemif which is located at 0x30000000 have address space at 0x21000a00?

2) Why is cs2 defined cs2@30000000 and not cs2@1,0

3) What is the line reg = <0x2 0x0 0x8000000 0x6 0x0 0x100>; doing?

4) Any explanation of how the signal lines (ta, rhold, rstrobe, etc.) are set up would be helpful.

aemif@30000000 {
        compatible = "ti,davinci-aemif";
        #address-cells = <0x2>;
        #size-cells = <0x1>;
        reg = <0x21000a00 0x100>;
        ranges = <0x2 0x0 0x30000000 0x8000000 0x3 0x0 0x34000000 0x4000000 0x4 0x0 0x38000000 0x4000000 0x5 0x0 0x3c000000 0x4000000 0x6 0x0 0x21000a00 0x100>;
        clocks = <0x11>;
        clock-names = "aemif";

        cs2@30000000 {
            compatible = "ti,davinci-cs";
            #address-cells = <0x1>;
            #size-cells = <0x1>;
            ti,davinci-cs-ta = <0xc>;
            ti,davinci-cs-rhold = <0x6>;
            ti,davinci-cs-rstrobe = <0x17>;
            ti,davinci-cs-rsetup = <0x9>;
            ti,davinci-cs-whold = <0x8>;
            ti,davinci-cs-wstrobe = <0x17>;
            ti,davinci-cs-wsetup = <0x8>;
        };

        nand@2,0 {
            compatible = "ti,davinci-nand";
            reg = <0x2 0x0 0x8000000 0x6 0x0 0x100>;
            #address-cells = <0x1>;
            #size-cells = <0x1>;
            ti,davinci-chipselect = <0x0>;
            ti,davinci-mask-ale = <0x2000>;
            ti,davinci-mask-cle = <0x4000>;
            ti,davinci-mask-chipsel = <0x0>;
            ti,davinci-ecc-mode = "hw";
            ti,davinci-ecc-bits = <0x4>;
            ti,davinci-nand-use-bbt;
            ti,davinci-no-subpage-write;
            clocks = <0x11>;
            clock-names = "aemif";

            partition@0 {
                label = "u-boot";
                reg = <0x0 0x100000>;
                read-only;
            };

            partition@100000 {
                label = "params";
                reg = <0x100000 0x80000>;
                read-only;
            };

            partition@180000 {
                label = "ubifs";
                reg = <0x180000 0x1fe80000>;
            };
        };
    };

score 1 · Answer 1 · answered Apr 04 '14 at 10:39

Your device tree is obviously wrong.

1/ reg = <0x21000a00 0x100>; is informing that aemif is actually located at 0x21000a00 and has 32 registers (0x100/4) so the unit-address must be 0x21000a00: aemif@21000a00

2/ again, the unit-address must match the reg property, you have no reg property in cs2..

3/ reg = <0x2 0x0 0x8000000 0x6 0x0 0x100>; reg refers to the ranges property of the node parent. Here, it can be interpreted as: - from range 0x2, at offset 0x0 (that would be 0x30000000), size 0x8000000 - from range 0x6, offset 0x0, size 0x100

4/ you'll have to look a the driver having the "ti,davinci-cs" compatible string, I can't help as it is not mainlined.

Deciphering Device Tree

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