Generate various data intensity on bus

Question

I am trying to generate various types of data intensity on bus on a multiprocessor environment. Basically I need two patterns - almost negligible traffic on bus and very high traffic on bus. Initially I was thinking about accessing registers and not writing them back to cache/main memory to generate a low bus traffic. But I am not very sure about the idea. Besides I am doing the coding part in Java.

Any hints how to do this?

Architecture: x86_64

EDIT: I have the following code snippet.

    mutex.lock();
    try{
        // Generate Bus traffic
    }
    finally{
        mutex.unlock();
    }

For each thread, I am trying to generate the traffic in the critical section.

Please clarify -- what microprocessor bus are you talking about (data, control, ...) — ErstwhileIII, Mar 21 '14 at 18:13

maaartinus · Accepted Answer · 2014-03-21T18:32:12.383

0

Accessing registers generates zero traffic on the bus (unless you mean some CPU-internal bus). To generate maximum traffic on a CPU-memory bus, just read an array bigger than your biggest cache (typically L3 with a few megabytes). Make sure the read data gets actually used, so that DCE doesn't kick in.

long[] data = new long[1<<24]; // 8 * 16MB
volatile long blackhole;

void saturateBus() {
    long sum = 0;
    for (long x : data) sum += x;
    blackhole = sum;
}

This should saturate your memory bus on a modern amd64 architecture as the loop can execute in 1 cycle per element. Assuming some unbelievably fast memory, you could need to unroll manually like this

    long sum0 = 0, sum1 = 0;
    for (int i=0; i<data.length; i+=2) { // assuming even `data.length`
        sum0 += data[i+0];
        sum1 += data[i+1];
    }
    blackhole = sum0 + sum1;

edited Mar 21 '14 at 18:32

answered Mar 21 '14 at 18:27

maaartinus

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Thanks! Now coming to accessing the registers part, how can I actually do it? Is it possible in Java? – sbasu276 Mar 22 '14 at 05:59
@sbasu276: I don't understand. Most programs use registers most of the time as they're much faster than cache/memory. – maaartinus Mar 22 '14 at 06:08
Pardon me for being so naive. Allocation of a register for a variable depends on the compiler I believe. If there's too much register requests, then most will be accessed through cache/memory. All I wanted to know, is there a way to ensure that I am truly accessing a register in the runtime? – sbasu276 Mar 22 '14 at 06:18
@sbasu276: I see. For a real program you need to inspect the generated assembly code. While the x86 has enough registers for most programs, there are optimizations like loop unrolling which multiply the demand. Sometimes the JIT outsmarts itself. – maaartinus Mar 22 '14 at 16:38

Generate various data intensity on bus

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