In a C file file.c I have
#define STUFF
I want a Makefile so that I can prevent STUFF from being defined in file.c. I want to control the compilation using only the Makefile (and I do not want to comment out the line in the .c file directly).
gcc has the -D option. I can do
gcc -D STUFF file.c -o output
for defining STUFF; but I cannot Undefine STUFF invoking gcc or using the Makefile (with gcc invoked in the Makefile of course).
Any hint ?