I have a simple block written in System C that takes in two 10x10 arrays, and performs matrix multiplication on them to produce a 10x1 output. The issue I am having is that these 10x10 arrays are actually stored as "doubles" so the data coming into this block is very large and the space utilization on the FPGA board I am using is too large for my purposes.
How do I serially read in one bit per clock cycle of the 10x10 arrays so that I am not trying to push in two 10x10 double arrays in one clock cycle?
How would I also set up my testbench to send in this data?
Currently in my module I have:
sc_in<double> in_0;
double [10][10] input_0;
void init_0(){
int i, j;
for (i=0; i<10; i++){
for(j=0; j<10; j++){
input_0[i][j] = in_0.read();
}
}
}
SC_METHOD(init_0);
sensitive << in_0 << clock.pos();
and my testbench runs as follows:
for(i=0; i<10; i++){
for(j=0; j<10; j++){
in_0 = j;
wait();
}
}
These two snippets of code are only to provide the setting up of the data prior to the matrix multiplication. The current code produces input_0 to be a 10x10 matrix holding all 9's, i.e. the last value of the double for loop in my testbench. I want a 10x10 array where each row is {0 1 2 3 4 5 6 7 8 9}.
Thanks.