We have a binary number and we need to generate combination of 2 1's from the given number. If given such a combination of 2 1's we should be able to produce the next combination.
Example:-
Given vector : 10101111 Given combination : 10100000 output : 10001000
Given vector : 10101111 Given combination : 10001000 output : 10000100
Given vector : 10101111 Given combination : 10000010 output : 10000001
Given vector : 10101111 Given combination : 10000001 output : 00101000
Given vector : 10101111 Given combination : 00101000 output : 00100100
Edit: Once the 2nd 1 reaches the last 1 in the given binary number, the 1st 1 is incremented(set to next '1' in the binary number and the 2nd '1' is made the '1' that comes after the 1st '1'(as in eg 4))
This is to be done in hardware so it should not be computationally complex. How can we design this module in VHDL.