How to write generic commands in makefile?

Question

This is what my current version looks like:

CC = gcc
CFLAGS = `sdl-config --cflags`
LIBS = `sdl-config --libs` -lSDL_ttf

program: uprising

uprising: main.o init.o display.o move.o global.o control.o battle.o
    $(CC) main.o init.o display.o move.o global.o control.o battle.o -o uprising $(CFLAGS) $(LIBS)

global.o: global.c
    $(CC) -c global.c -o global.o $(CFLAGS) 

battle.o: battle.c
    $(CC) -c battle.c -o battle.o $(CFLAGS) 

main.o: main.c
    $(CC) -c main.c -o main.o $(CFLAGS) 

init.o: init.c
    $(CC) -c init.c -o init.o $(CFLAGS) 

display.o: display.c
    $(CC) -c display.c -o display.o $(CFLAGS) 

move.o: move.c
    $(CC) -c move.c -o move.o $(CFLAGS) 

control.o: control.c
    $(CC) -c control.c -o control.o $(CFLAGS) 
clean:
    rm -f *~ *# uprising init.o main.o display.o move.o global.o control.o

You see, every module gets compiled in the same manner. I've been tired of editing this makefile when adding a new module to my project. Is there any way to type a module's name for just once (as if it was a argument), and let makefile build each module in the same way?

score 0 · Accepted Answer · answered Feb 18 '14 at 00:41

If you change LIBS to LDLIBS, you can write the entire makefile in just this:

CC = gcc
CFLAGS = `sdl-config --cflags`
LDLIBS = `sdl-config --libs` -lSDL_ttf

program: uprising

uprising: main.o init.o display.o move.o global.o control.o battle.o
        $(CC) $^ -o $@ $(CFLAGS) $(LDLIBS)

clean:
        rm -f *~ *# uprising *.o

How to write generic commands in makefile?

1 Answers1