Are so many keyboard controller wait calls needed when enabling the A20 gate

Question

From the OSDev page on the A20 line, the code for enabling A20 is given as:

enable_A20:
    cli

    call    a20wait
    mov     al,0xAD
    out     0x64,al

    call    a20wait
    mov     al,0xD0
    out     0x64,al

    call    a20wait2
    in      al,0x60
    push    eax

    call    a20wait
    mov     al,0xD1
    out     0x64,al

    call    a20wait
    pop     eax
    or      al,2
    out     0x60,al

    call    a20wait
    mov     al,0xAE
    out     0x64,al

    call    a20wait
    sti
    ret

a20wait:
    in      al,0x64
    test    al,2
    jnz     a20wait
    ret


a20wait2:
    in      al,0x64
    test    al,1
    jz      a20wait2
    ret

a20wait waits on the input buffer and a20wait2 on the output buffer.

From what I understood, writing to/reading from 0x64 access the command/status register and not the buffer registers.

Then why are there are so many waits on the input/output buffers ? Shouldn't there be one on the output buffer before reading the status register, and one on the input buffer after writing the new command byte ?

I tried disabling all other wait calls except the two I mentioned in the previous paragraph and it worked fine. But I'm curious as to why they are there. Is there some other reason ?

The a20wait function tests if the input buffer status bit is clear, which is necessary before writing any value to port 0x60 or 0x64. See http://wiki.osdev.org/%228042%22_PS/2_Controller#Status_Register for more details. — Adrian Collado, Feb 28 '14 at 04:26
Also, I've noticed you've asked quite a few questions about Operating System Development here. I would recommend signing up for an account at http://forum.osdev.org/index.php, as virtually all of the tutorials you have read are written by people from that community. You'll probably get a more detailed answer in less time if you ask there. — Adrian Collado, Feb 28 '14 at 05:02

Hans Passant · Accepted Answer · 2014-02-17T11:14:45.007

The A20 gate control signal is provided by another processor. Traditionally an 8042 micro-controller, one of its output port pins drives the signal. That micro-controller was intended to handle the keyboard interface, it had a unused output pin so the IBM engineers that designed the AT decided to cut hardware cost and control the A20 gate signal with it.

The interface between the main processor and that microcontroller is a very simplistic one, just two 8-bit ports. I/O address 0x60 is the data port, 0x64 is the command/status port.

The 8042 executes its own program, completely independent from the main processor. So some care is required to talk to it, the handshaking has to be done in software. You can only write something after you made sure that the 8042 obtained the previous command and executed it. And only read something after you made sure that the 8042 wrote to the data port. Spinning on the input and output buffer status bits is thus required to let the 8042 catch up.

Removing that spinning may work in an emulator. Pretty unlikely to work correctly on real hardware, you could get lucky. There's completely no point in risking it.

But in the case of writing to/reading from 0x64, which does not involve the input or output buffers, why do we need to wait ? I agree that for data transfer, wait would be required. — Cygnus, Feb 17 '14 at 14:58

Are so many keyboard controller wait calls needed when enabling the A20 gate

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