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I'm using Angtsrom embedded linux kernel v.2.6.37, based on Technexion distribution. DM3730 SoC, TDM3730 module, custom baseboard. CodeSourcery toolchain v. 2010-09.50

Here is dataflow in my system: https://i.stack.imgur.com/kPhKw.png

FPGA generates incrementing data, Kernel reads it via GPMC DMA. GPMC pack size = 512 data samples. Buffer size = 61440 32bit samples (=60 ram pages).

DMA buffer is allocated by dma_alloc_coherent and mapped to userspace by mmap() call. User application directly reads data from DMA buffer and saving to NAND using fwrite() call. User reads data by 4096 samples at once.

And what I see in my file? https://i.stack.imgur.com/etzo0.png Red line means first border of ring buffer. Ooops! Small packs (~16 samples) starts to hide after border. Their values is accurately = "old" values of corresponding buffer position. But WHY? 16 samples is much lesser than DMA pack size and user read pack size, so there cannot be pointers mismatch.

I guess there is some mmap() feature is hiding somewhere. I have tried different flags for mmap() - such as MAP_LOCKED, MAP_POPULATE, MAP_NONBLOCK with no success. I completely missunderstanding this behaviour :(

P.S. When i'm using copy_to_user() from kernel instead of mmap() and zero-copy access, there is no such behaviour.

Konstantin Utkin
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    Is anything else reading data from that buffer? 16 samples sounds like it might fit into one cache line. Check that you're correctly flushing the cache before reading from user space. I suspect you have a cache coherency problem. – Kristof Provost Feb 11 '14 at 13:31
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    No, only one user pthread reads data from buffer. But you're right concerning cache: i've added flush_cache_all() in my driver, and 'strange behaviour' disappears. Thank you, Kristof! – Konstantin Utkin Feb 12 '14 at 01:46
  • @KonstantinUtkin could you please post somewhere on git example of preparation GPMC DMA for reads on DM3730? I didn't found any example – Ihor Baklykov May 20 '20 at 18:22
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    @IGR94 I left this job a long time ago, and don't remember details, unfortunately. Some code is left here: https://github.com/ENG-REZERVE/p347_kernel_patch/blob/master/char/p347_fpga.c , however I am not sure if it is valid and fully working version. – Konstantin Utkin May 21 '20 at 09:50
  • @KonstantinUtkin thank you, I'm just looking for some references to start from. As I understood, DMA is set up like Linux dmaengine setup + platform-specific setup – Ihor Baklykov May 21 '20 at 12:55
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    @IGR94 Hope my example could help. However, in my case it is mostly platform-specific code, as we were working with FPGA connected via GPMC. If you have no changes in hardware (I mean, some 3rd-party board with all the stuff and linux prepared), there could be enough some calls to linux devices, if interface is implemented. I believe, Texas Instruments should have some examples in their linux package related to DM3730. – Konstantin Utkin May 22 '20 at 02:18
  • @KonstantinUtkin well, it did help a bit. Now I understand how to set up transfer and how to wait for completion of DMA – Ihor Baklykov May 22 '20 at 09:27

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