A simple program on linux device driver

Question

include

#include<linux/module.h>
#include<linux/init.h>

int my_init(void){
        printk("<1> Angus : Module Insertion is successful!");
        return 0;
}

void my_cleanup(void){
        printk("<1> Angus : Module unloading successful!");
}

module_init(my_init);
module_cleanup(my_cleanup);

Makefile :

obj-m:=simple.o
aoll:
        make -C /usr/src/linux-headers-3.2.0-25-generic-pae/ M=$(PWD) modules
clean:

        make -C /usr/src/linux-headers-3.2.0-25-generic-pae/ M=$(PWD) clean

make -C => will change to the directory before doing a make, In this path /usr/src/linux-headers-3.2.0-25-generic-pae/ I have Makefile , why is the M=$(PWD) needed ? what does it do, where I can check for $PWD ? The Makefile inside the /usr/src/linux-headers-3.2.0-25-generic-pae/ has the target all:modules and target modules and has the target clean. What is obj-m ?

score 3 · Accepted Answer · answered Oct 25 '13 at 10:20

You'd better to read the paragraph at page 24 of the book Linux Device Drivers, 3rd edition (freely available at http://oreilly.com/openbook/linuxdrive3/book/index.html).

The -C option makes it change the directory to the one provided. There, it finds the kernel's top-level Makefile. Then, the M= option causes that Makefile to move back to your module source directory before trying to build the modules target ($PWD is a variable containing the path of your current directory).

obj-m is a variable containing the list of kernel modules to be build (see https://www.kernel.org/doc/Documentation/kbuild/makefiles.txt) .

Paul Evans · Answer 2 · 2013-10-29T10:26:25.957

1

You could change your Makefile rules:

aoll:
    (cd /usr/src/linux-headers-3.2.0-25-generic-pae/;echo $(PWD);make m=$(PWD) module)

edited Oct 29 '13 at 10:26

answered Oct 25 '13 at 10:18

Paul Evans

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Why is this flagged as "not an answer"? It looks fine to me. – LarsH Oct 25 '13 at 14:28
@LarsH: I agree, it's an answer, it's just wrong. :-) The problem is that three separate command lines in a `Makefile` are run by three separate shell commands. The first `cd` runs and then the shell exits and you're back to where you were, the second `echo` runs and prints working directory, and the third `make` runs in the wrong directory. – torek Oct 26 '13 at 22:32
@torek: OK. So it's wrong, you downvote it, and/or comment showing why it's wrong. I don't think that's what the "not an answer" flag is for. – LarsH Oct 27 '13 at 02:28
(@LarsH: I didn't even down-vote, I just saw the flag on "flags" and disagreed with it ... and then commented.) – torek Oct 27 '13 at 06:12
@torek: OK. Yeah, I didn't mean to sound like you in particular had downvoted... it was meant to be the generic "you". – LarsH Oct 28 '13 at 13:44

score 1 · Answer 3 · answered Oct 25 '13 at 10:19

1

why is the M=$(PWD) needed ?

The M= option causes that makefile to move back into your module source directory before trying to build the modules target. This target, in turn, refers to the list of modules found in the obj-m variable.

What is obj-m ?

The assignment above states that there is one module to be built from the object file hello.o. The resulting module is named hello.ko after being built from the object file.

answered Oct 25 '13 at 10:19

vinay hunachyal

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Thanks vinay hunachyal – Angus Oct 25 '13 at 10:50

A simple program on linux device driver

include

3 Answers3

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