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Hi I am creating a circuit in Logisim and I am using a counter and a splitter. What i want to do is the following.

I have 3 single inputs bits(S0, S1, S2) that are connected to a splitter. My question is how do I connect the splitter signal to the reset input of the counter. In other words, what I want to do is when I input 0,1,1 in S0 S1 S2 the counter must reset when it reaches the inputs, in this case 6(011 in decimal).

What I was trying to do was extend the bits of the splitter to fit the reset option of the counter but id didn't work.

Any help would be appreciated or any new ideas on how to solve that problem.

Thanks

Guisel Sumaran Quinonez
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  • This question appears to be off-topic because it is about digital electronics - it should be on [electronics.se](http://electronics.stackexchange.com/). – Mac Jan 19 '14 at 09:55
  • It's about the digital design but not about the electronics, Electronic circuitry is one of the several possible implementations (like photonics, fluidics, soldier crabs, etc.) of the digital design and it's grammar (and, or, not, xor, etc.). Designing something in logisim is much more like programming (in fact Logisim is Turing Complete and you can implement whole algorithms with it. – underscore Nov 01 '14 at 22:08

1 Answers1

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Assuming you have Logisim version 2.7.x and you have a counter with "Data Bits" property set to "3" (which count up to seven than wraps around to zero and continue). You can set the "Max Value" property of the counter to "6" (which count up to six than wraps around to zero...). But of course you cannot do the same thing in real circuit. So here is the circuit :

  • Use an "And Gate" with 3 inputs and set "And Gates" inputs to desired bit pattern with setting "Negate" property to "Yes" on zero valued bits ( 110 = No.No.Yes = 6 ).

  • Use D type flip-flop and set D flip-flop's "trigger" property to falling edge which activates counter reset signal on clock signal's "falling" or "negative" edge (it works with rising edge -default setting- in logisim also but you may experience "unexpected behavior" in other designs which I've learned the hard way)

  • Drive flip flop's "D" input with the "And Gate"s output.

  • Drive "Counter" and the "D Flip-Flop" with the same clock signal.

  • Drive "And Gate"s inputs (3bits) with the "Counter"s output "Q" (3bits) using splitter.

enter image description here

underscore
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