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Question: Make Calendar Which Shows Month Number and Days of Month ? Write Both in Combinational and Sequential VHDL Constructs ?

I am new on this VHDL and i have a quiz on Monday .. Anyone have any idea about where to start and how to start writing the programming in VHDL ? Any help will be greatly appreciated ..

Thanks

  • @FarhadA Other than the question as stated being extremely vague, I see nothing wrong with this question. Surely one can implement a calendar in VHDL and output to a variety of interfaces, such as a simple 7 segment displays. – Josh Sep 26 '13 at 16:27
  • My first question would be, what are the assumed inputs? How does your design know what day it is? Do you need to be able to program the calendar once you power it up? My second question would be, what is the expected output and in what format? – Josh Sep 26 '13 at 16:28
  • @Josh yes I had to design a Calender on VHDL for using XilinxISE Software I still dont know how to write the programing Code thats why i asked this Q for help. I know VHDL is VHSIC-HDL that is used for modelling and simulation of Electronic Devices. My Question Was Q: You have to design a system that takes month number & determines number of days of the month for a year. a: Use encoding (if required) for the inputs & outputs b: Design the system using both combinational & sequential VHDL constructs as 2 separate designs. I Think inputs are Month Number & Output are Our Number of Days. – Linnea Anderson Sep 27 '13 at 10:25
  • Alright, so the task is... You receive an input of the month number (1-12) and you need to output the number of days in the month (1-31)? Do you need to account for leap years? – Josh Sep 27 '13 at 10:43
  • Yeah, Month Number is our Input which is (1-12) & Number of Days is our Output (1-31) and yes its for a leap year. – Linnea Anderson Sep 27 '13 at 12:00

1 Answers1

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Here is something to get you started with your assignment. It accepts the binary value of month, 1-12, and if it is a leap year or not, and outputs the number of days in that month. This is done without a clock (combinatorial/asynchronous logic).

I think you can take this and determine the best way to use sequential statements to create an alternative implementation based on what you assignment is asking for.

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity Days_In_Month is
   port (
      I_MONTH         : in  unsigned(3 downto 0);
      I_LEAP_YEAR     : in  std_logic;
      O_DAYS_IN_MONTH : out unsigned(4 downto 0)
      );
end entity Days_In_Month;

architecture Days_In_Month_combinatorial of Days_In_Month is

   signal month_30d : std_logic;
   signal month_28d : std_logic;
   signal month_31d : std_logic;
   signal month_29d : std_logic;

begin

   month_30d <= '1' when I_MONTH = 9 or
                         I_MONTH = 4 or
                         I_MONTH = 6 or
                         I_MONTH = 11
                    else '0';

   month_28d <= '1' when I_MONTH = 2 and
                         I_LEAP_YEAR = '0'
                    else '0';
   month_29d <= '1' when I_MONTH = 2 and
                         I_LEAP_YEAR = '1'
                    else '0';
   month_31d <= '1' when month_30d = '0' and
                         month_28d = '0' and
                         month_29d = '0'
                    else '0';

   O_DAYS_IN_MONTH <= to_unsigned(30,O_DAYS_IN_MONTH'length) when month_30d = '1' else
                      to_unsigned(28,O_DAYS_IN_MONTH'length) when month_28d = '1' else
                      to_unsigned(29,O_DAYS_IN_MONTH'length) when month_29d = '1' else
                      to_unsigned(31,O_DAYS_IN_MONTH'length) when month_31d = '1'
                      else to_unsigned(0,O_DAYS_IN_MONTH'length);                   

end architecture Days_In_Month_combinatorial;
Josh
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