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Which Machine Cycles are required for any Jump Statement in 8085 if the condition to be checked satisfies and for the case when it doesn't satisfy?

EDIT: I know the number. I want to know what are those Machine Cycles. The first one is Opcode Fetch, but the rest of them?

Ozil
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5 Answers5

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When the J condition is not satisfied, the cycles are

  1. Opcode fetch (4 T states)
  2. Memory read (3 T states) of the lower byte specified, while simultaneously checking the flag condition.

If the condition isn't satisfied, the processor ends this instruction cycle after these 2 machine cycles and 4+3 = 7 T states.

Pbk1303
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According to this instruction set reference, a conditional branch on the 8085 takes 9 T-states (2 M-cycles) if the branch isn't taken, and 18 T-states (5 M-cycles) if the branch is taken.

A T-state equals one clock cycle on the 8085 as far as I know. An M-cycle is made up of several (3 to 6) T-states. Examples of M-cycles are "Opcode Fetch" (which always is the first M-cycle of every instruction); "Memory Read" and "Memory Write".
You can read more about the 8085's states and cycles in this document.

Michael
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When it does satisfy the condition, the cycles on a 8085A are:

JNZ 9050H

  • Opcode Fetch
  • Memory Read: to get the lower order address byte
  • Memory Read: to get the higher order address byte

4+3+3 = 10 T-States in 3 machine cycles

I got here because I myself am in search of what the cycles are when the condition is not satisfied.

peteykun
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If the condition is satisfied 10T states, otherwise 7T states in case of conditional jump. In case of unconditional jump JMP its always 10T states

  • Can you explain what's wrong with [Michael's existing answer to this question](http://stackoverflow.com/a/18630013/224132), which conflicts with yours? Are they for a different revision of the hardware, or is the manual he found incorrect? – Peter Cordes Nov 20 '16 at 05:34
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Let's take ' JNZ 16-bit address ' instruction as example. And following code for understanding :

INR B           // B=03 H 
JNZ C200 H 

Here the condition will be true because register B is not zero. Hence 10 t-states.

If register B =00 H then the JNZ condition will be false as it is zero. Hence 7 t- states.

True: OF + MR + MR = 4 +3+3= 10 t states
False: OF + MR = 4+3 =7 t states

Dmitry
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