What 2 Mips assembly instructions would induce exactly 2 stalls?

Asked Aug 19 '13 at 10:38

Active Aug 19 '13 at 13:43

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I am using the Mips instruction set architecture and the WinMips64 simulator.

My question is when forwarding is deactivated what 2 instructions would produce the 2 stalls, and then when forwarding is enabled produce 0.

I would also like to know how instructions pass through the Mips pipeline when forwarding is enabled.

edited Aug 19 '13 at 13:43

asked Aug 19 '13 at 10:38

Bungalo Soldier

I guess you've read MIPS manuals and they do not answer your question – m0skit0 Aug 19 '13 at 14:14
1

Have a look a slides 6 and 7 [here](http://www.cs.washington.edu/education/courses/cse378/07au/lectures/L13-Stalls-And-Flushes.ppt) for an example (a better source is probably available if you search a little harder) – user786653 Aug 19 '13 at 15:54

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