In a basic MIPS five stage pipeline, if the performance of the ALU is improved by 50%, what will be the impact on the overall performance of the CPU?
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One *million* percent! – Kerrek SB Aug 01 '13 at 09:21
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Can we assume the ALU is a perfect sphere? – Brett Hale Aug 01 '13 at 11:04
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On a frictionless surface? – Brian Knoblauch Aug 01 '13 at 17:39
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It depends on two factors: The time each of the other stages take and the clock-frequency. If any of the other stages take longer than the ALU, that will be the limiting factor. The maximum clock-frequency (fMax) is limited to the slowest stage in the pipeline. So if your ALU can produce a result in 1ns (fMax=1ghz) if any of the other stages is slower, the maximum frequency could only be that of that stage.

Mux
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