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I am working with UART of lPC1788,in that I did the following settings for PCLK as 12MHZ and baud rate as 115200 but while I am simulating this code the baud rate is not assigned as 115200 or approx.

uint32_t uart0_init()
{

  LPC_SC->PCONP |=(1<<3);        //Enabling power/clock for UART0
  LPC_IOCON->P0_2 = 1;           //Selecting fn. 001 for P0.2(U0_TXD)
  LPC_IOCON->P0_3 = 1;           //Selecting fn. 001 for P0.3(U0_RXD)
  LPC_UART0->LCR =(0x83);        //Selecting DLAB=1,1 stop bit,Parity bit and 8-bit character length

  LPC_UART0->DLL = 0x04;         //For PCLK=12MHZ and baud rate as 115200,DLL=4(in dec.)
  LPC_UART0->DLM = 0x00;         //For PCLK=12MHZ and baud rate as 115200,DLM=0(in dec.)
  LPC_UART0->FDR =(0x85);        //DIVADDVAL=1(3:0) and MULVAL=2(7:4) in FDR calculated from the FRest value 
  LPC_UART0->LCR =(0x03);        //Disabling DLAB=0
  LPC_UART0->FCR |=(7<<0);       //Enable FIFOEN,TXFIFORES and RXFIFORES in FCR(0,1,2)

  LPC_UART0->FCR |=(0<<0);       //Disable FIFOEN,TXFIFORES and RXFIFORES in FCR(0,1,2)

  //NVIC_EnableIRQ(UART0_IRQn);

  //LPC_UART0->IER = IER_RBRIE | IER_THREIE | IER_RXIE;

  return 1;

}

For me its coming near 384615,its totally different.Is there any calculations to be done to obtain exact of 115200 baud.

Please do clear for me..

artless noise
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Vignesh_Jay
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  • Did you change PLLClock ? PCLKSEL is 12Mhz ? whats the CCLKSEL ? – Gossamer Jun 01 '13 at 21:00
  • Its 120Mhz and default PCLKSEL value is 0x02,so the obtained PCLK value in the clock divider window during simulation is 60mhz. So whether I can add LPC_SC->PCLKSEL |=(1<<3); – Vignesh_Jay Jun 03 '13 at 09:52

1 Answers1

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Dont use uart init to change system control settings. You will overwrite them elsewhere if you are not careful. Create sysInit function and set it there. Set divider to 10 (0x0a).

LPC_SC->PCLKSEL = 0x0A;

This will divide MCLK with 10 and you will get 12Mhz clock for peripherals. After that you need to set FDR and DLL settings to achieve ~115200 baud.

Gossamer
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  • Hi Gossamer, Thanks for your point ,but in system they used to divide CCLK(120MHZ) with 0x02 and if I want to get 12MHZ,the ways are to clear the PCLKSEL_VAL in system file or to do the (|) operation as I mentioned above post.Finally,I had obtained a PCLK value of 12MHZ and UART0 is working fine for me with 115200 baud rate. – Vignesh_Jay Jun 13 '13 at 10:05