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I want to program to set a break point on ARM1176jzs. According to the manual, the breakpoint value/control registers are accessible only if DSCR[15:14] is equal to b10, meaning Monitor mode.
And according to the manual, DSCR can be written no matter what value DSCR[15:14] takes.
But actually I find that bit 15 of DSCR cannot be changed to one by a MCR instruction. Any one could help?

Thanks

Pan Ruochen
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  • I have the same problem. I cannot write to DSCR using MCR instruction. I'm testing on a Cortex-R4. Did you find any solution to this? – cojocar Nov 26 '13 at 13:31
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    No, I did not solve this problem. But the same code worked on the same CPU from another chipset vendor. So I just take it as limitations imposed by chipset vendors. – Pan Ruochen Nov 26 '13 at 14:27
  • Were you able to figure out that the vendor disabled this feature by checking some flags? I checked DBGEN and it was assert in my case. – cojocar Nov 26 '13 at 18:26
  • Actually I don not find any descriptions about limitations on the break point settings on the vendor's user manual. So I just assume that there could be limitations on usage of breakpoints for some vendor's chipset, probably due to anti-debug purposes. – Pan Ruochen Nov 27 '13 at 09:29

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