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I am using IEEE fixed point package in VHDL.

It works well, but I now facing a problem concerning their string representation in a test bench : I would like to dump them in a text file.

I have found that it is indeed possible to directly write ufixed or sfixed using :

write(buf, to_string(x)); --where x is either sfixed or ufixed (and buf : line)

But then I get values like 11110001.10101 (for sfixed q8.5 representation).

So my question : how to convert back these fixed point numbers to reals (and then to string) ?

JCLL
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  • SO, in the example above you want 11110001.10101 written into your text file as 241.6563 ? – Jotorious May 01 '13 at 14:14
  • From googling it looks like there is a to_real() function that you could use. – Jotorious May 01 '13 at 14:22
  • Have you tried something like: write(buf, to_string(to_real((x))); – Jotorious May 01 '13 at 17:46
  • yes, I have tried that. on GHDL, I get : "prefix is neither a function name nor can it be sliced or indexed" – JCLL May 01 '13 at 18:59
  • The fixed generic package (fixed_generic_pkg.vhdl, fixed_generic_pkg-body.vhdl) is available from the IEEE Supplementary Materials page for [IEEE Std 1076-2008](http://standards.ieee.org/downloads/1076/1076-2008/) (the zip file). This package contains the referenced to_real functions for sfixed and ufixed. You might or might not run into dependencies building for ghdl and should consult the ghdl user manual as well. The two functions in the package body can be used for inspiration for local conversion. –  May 01 '13 at 21:59
  • GHDL (currently) misleadingly gives the message `prefix is neither a function name nor can it be sliced or indexed` when it cannot find an overloaded subprogram that exactly matches your call (often because the type of one of the parameters is wrong). As it happens I submitted a patch last week to (among other things) improve that message - see https://gna.org/bugs/?20769 : The exact line and exact error message could pinpoint the error more precisely. –  May 05 '13 at 11:21

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The variable needs to be split into two std-logic-vector parts, the integer part can be converted to a string using standard conversion, but for the fraction part the string conversion is a bit different. For the integer part you need to use a loop and divide by 10 and convert the modulo remainder into ascii character, building up from the lower digit to the higher digit. For the fractional part it also need a loop but one needs to multiply by 10 take the floor and isolate this digit to get the corresponding character, then that integer is used to be substracted to the fraction number, etc. This is the concept, worked in MATLAB to test and making a vhdl version I will share soon. I was surprised not to find such useful function anywhere. Of course fixed-point format can vary Q(N,M) N and M can have all sorts of values, while for floating point, it is standardized.

bhamadicharef
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