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I have defined

reg bricks[0:3][0:7]

in Verilog Module. How can I assign this 2d array as 

{{1,1,1,0,1,1,1},{1,1,1,0,1,1,1},{1,1,1,0,1,1,1},{1,1,1,0,1,1,1}}.

Please help

skjindal93
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  • Assign it how? As a default value, or during operation? – Tim Apr 10 '13 at 16:39
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    Are you sure you want a 2d array of bits, and not a 1d array of a multi-bit value? e.g. `reg [7:0] bricks[0:3]` – dwikle Apr 10 '13 at 19:17
  • [this link](http://stackoverflow.com/questions/14130181/way-to-initialize-synthesizable-2d-array-with-constant-values-in-verilog) covers some of what you are asking. As mentioned there you cannot do a direct initialization the way you mentioned in verilog. But tools that synthesize system verilog might support the format you have. – vinay samuel Aug 13 '13 at 15:39

1 Answers1

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reg bricks [0:3][0:7];     //creates an unpacked array 
                           // It means you can access individual bits

bricks[1][0] = 0 ;         // Assigns 0 to the bit referenced by 1 and 0 

bricks [2] = 0 ;           // Illegal Syntax

bricks [1][0:3] = 0 ;      //Illegal Syntax

System verilog provides much more flexibility

chitranna
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