Indirect addressing with + and []

Question

Im a bit new to the asm stuff. Looking through asm generated from C for TI's C28x CPU and have the instruction

MOVL *+XAR4[0],ACC

I know its a long operand move instruction that takes the value in the accumulator and puts it in the location pointed at by.... what?

XAR4 is auxiliary register 4 but what does the '+' and '[0]' do? Will they take extra cycles?

Michael · Accepted Answer · 2013-04-05T13:34:11.167

1

From section 5.6 "Indirect Addressing Modes" of the "TMS320C28x DSP CPU and Instruction Set Reference Guide":

*+XARn[3bit]
32bitDataAddr(31:0) = XARn + 3bit
Note: The immediate value is treated as an unsigned 3-bit value.

So it will store ACC at the memory location pointed to by XAR4 (XAR4+0 to be specific).

When the 3-bit offset is 0 it's possible to leave it out:

The assembler also accepts ”*XARn” as an addressing mode.
This is the same encoding as the ”*+XARn[0]” mode

edited Apr 05 '13 at 13:34

answered Apr 05 '13 at 13:19

Michael

Thanks, but Im still not sure how that differs from MOVL *XAR4,ACC ?? – Toby Apr 05 '13 at 13:23
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@Toby: That is also covered in the same document. See my edit. – Michael Apr 05 '13 at 13:34
Thanks for that. Now that leaves me to wonder why code would be generated that does it in *+XARn[0] manner rather than the *XARn in the first place ;) – Toby Apr 05 '13 at 13:44
Ah, to conclude, the reason for the bit addressing is that *XARn is a structure (members are stored contiguously) so *XAR4[0] is the first member, *XAR4[1] the second member and so on. FAB! – Toby Apr 05 '13 at 14:51

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