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I have multiple source files (let's call them file1.c, file2.c, etc.) that I would like compile into individual executables. Relevant part of the makefile:

file%.x: file%.o
    $(CC) $(CFLAGS) $< -o $@
file%.o: file%.c
    $(CC) $(CFLAGS) -c $< -o $@

I can make them individually fine with make file1.x, make file2.x, etc. I'd like to have a target in the makefile that builds all of the files. I tried a few things, but they didn't work:

all: file*.x

and

all: file%.x

Is there an easy way to do this? Thanks in advance.

jpalm
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3 Answers3

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SOURCES := $(wildcard file*.c)
FILES := $(SOURCES:.c=.x)

all: $(FILES)
Beta
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The weird thing here is that you are just building a bunch of OBJECT files. Typically, the object files would in-turn be used to link together to form an executable, thus your default rule would be to build that executable, which would build any of it's dependencies.

If you really just want to do it the way you are, I would do something like:

FILES=test1 test2 test3

all: $(FILES:%=%.o)

$(FILES:%.o): %.c
  $(CC) -o $@ $^
Brad
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I actually answered my own question (with help from answers to this question). The answer marked "correct" also works.

all: $(addsuffix .x, $(basename $(wildcard file*.c))

Thanks for the help.

Community
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jpalm
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