After reading a lot I came to know that there is no SINGLE method of calculating CRC. I need method/algorithm/VHDL code for calculating CRC specifically for Serial ATA (SATA)
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You are right. There is not a single algorithm. Why don't you choose one and implement it? (You certainly don't expect us to do it for you?) – Aki Suihkonen Mar 17 '13 at 08:35
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1@AkiSuihkonen: SATA mandates a specific algorithm. OP can't choose their own and expect it to interoperate with existing hardware. – NPE Mar 17 '13 at 08:36
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It still sounds like "type it for me in google" kind of non-question. Not productive. – Aki Suihkonen Mar 17 '13 at 08:38
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SATA uses IEEE 802.3 CRC. Here are some relevant resources:
- Serial ATA Bus
- Design and Implementation of a SATA Host Controller on a Spartan-6 FPGA (section 2.7.2 Error detection with CRC)
- IEEE 802.3 Cyclic Redundancy Check (Xilinx application note)

NPE
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Here is a complete description of that CRC, including the bit ordering and pre and post processing.

Mark Adler
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