1

Can I use a wire inside an always block? Like for example: 

        wire [3:0]a;
        assign a=3;

        always @(c)
           begin
                d=a+c;
           end

It got compiled without throwing any error. Why?

toolic
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aditya3524
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1 Answers1

6

Yes, you can use a wire's value inside an always block, you just can not assign a value to a wire in always or initial block.

The only real difference between a wire and reg is the syntax for assigning values.

In the above example d could also have been created as a wire, these are equivalent:

reg [3:0] answer_reg;
always @* begin
  answer_reg = a + c;
end

wire [3:0] answer_wire;
assign answer_wire = a + c;
Morgan
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  • What kind of hardware does this infer? Like in the above example, d is an adder who gets one input as c and the other as 'a' which is a constant. So, will 'a' be a wire connected to Vdd and gnd making a 3? – aditya3524 Feb 28 '13 at 17:33
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    Yes effectively, a is constant pattern logic `4'b0011` which can be though of as `GND GND VDD VDD`. wire vs reg has very little to do with hardware, they are really simulator optimisations. – Morgan Feb 28 '13 at 17:37