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How can I get memory dump in ModelSim on a regular basis?

I know how to export memory data. Is there a way to write in the .do file a command to export the memory data every 1000 ns or every x cycles?

Update:

Thanks for the answers. The way I'm doing it now:

mkdir -p mlog
set counter 0
set limit 30

while { true } {
   run 100 us
  incr counter +1
  mem save -o ./mlog/spram1_${counter}.mem -f mti -data binary -addr hex /ram_tb/spram1/mem
  mem save -o ./mlog/spram2_${counter}.mem -f mti -data binary -addr hex /ram_tb/spram2/mem
  /path/to/third/mem
}

This is in case you used run -all before and you don't know when the simulation stops. The VHDL testcase should of course have something like

ASSERT false
    REPORT "### End of Simulation!"
    SEVERITY failure;

to end the simulation (for a nicer way see the answers below, but this works)

In case you know how long the simulation will run you can also use this way:

  mkdir -p mlog
  set counter 0
  set limit 10

  while { $counter < $limit } {
    run 1 ns
    incr counter +1
    mem save -o ./mlog/filename1_${counter}.mem -f mti -data binary -addr hex /path/to/another/mem
    mem save -o ./mlog/filename2_${counter}.mem -f mti -data symbolic -addr hex -wordsperline 1 /path/to/mem
    ## mem save -o ./mlog/anotherfile ...
  }

that can replace "run 10 ns"

alternatively you can use a signal that indicates the end of simulation

  signal end_of_sim   : std_logic := '0';
  ...
  end_of_sim <= '1'

and in the do-file:

  when -label end_of_simulation {/end_of_sim == '1'} {
    echo "End of simulation"; 
    stop ;
    #quit -f
  }
Saro Taşciyan
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Sadık
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1 Answers1

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It's not a brilliant solution for your problem, but it could help you a bit.

In a TCL while loop you can do this two command:

while ... {
    run 100 ns;
    mem save -outfile $filename...
}

Note that a Modelsim DO file is a TCL file.

A better solution would be to add the dump of the memory in the 'onbreak' function.

onbreak {mem save ...}

Whenever you break or stop the simulation, the content of the RAM will be saved. Then you still need a trigger to break the simulation. Somebody?

vermaete
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  • thanks! I tried your first suggestion and it seemed to work. Maybe i can write something like 'while (true) { run 100 ns; break; }' and write the rest of the mem save commands in the onbreak function. – Sadık Feb 13 '13 at 10:24
  • I'm trying to trigger the onbreak function with " assert false report "End" severity failure;" but it doesn't work. why? btw: I will vote up as soon as I have enough reputation – Sadık Feb 14 '13 at 10:24
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    The 'onbreak' function is called when there is a breakpoint triggered. If you stop a simulation with the old way (assert... severty failure) you could use the onerror function. Note that the onerror function has to be defined before the run in the TCL/DO file. Note: the 2008 version of VHDl have a nicer way to stop or end a simulation. use 'env.stop()' or 'env.finished()'. – vermaete Feb 14 '13 at 11:25