Intel® 64 and IA-32 Architectures Optimization Reference Manual lists latency and throughput figures for various CPU instructions.
For transcendental functions (FSIN
etc) some of the figures are listed as ranges (page C-29). Footnote 4 explains:
Latency and Throughput of transcendental instructions can vary substantially in a dynamic execution environment. Only an approximate value or a range of values are given for these instructions.
My question is: what factors affect the throughput and latency of such instructions? I imagine the value of the argument is one factor. Are there any other?