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I have been writing my own "library" to handle different inits on an AVR chip. However, I am stuck on the action of the ADIE bit in the ADCSRA register (p.261 in the datasheet). The datasheet doesn't really explain how ADIE works. However, I haven't been able to get a reading out of the ADC whenever ADIE is set to 0. Why is that? I thought that the ADC worked like the timers- even if the interrupt isn't enabled, it would still be updating the ADC registers with readings.

This is the culprit code, whenever "interrupt" is set to anything but 1, the ADC doesn't work. Interestingly, unlike other interrupts, if there is no code within the ISR(ADC_vect) routine, the chip doesn't get stuck.

if(interrupt){ADCSRA|=1<<ADIE;}//enable the ADC conversion complete interrupt
else{ADCSRA&=~1<<ADIE;}
MechaPrime
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This code is missing some parentheses, so it doesn't do what you think it does. It looks like it may be doing the right thing by good luck.

if(interrupt){ADCSRA|=1<<ADIE;}//enable the ADC conversion complete
interrupt else{ADCSRA&=~1<<ADIE;}


~1<<ADIE != ~(1<<ADIE)

The datasheet seems pretty explicit:

ADCSRA Bit 3 – ADIE: ADC Interrupt Enable

When this bit is written to one and the I-bit in SREG is set, the ADC Conversion Complete Interrupt is activated.

This means that if bit 4 ADIF (flag) becomes 1, then the ADC interrupt vector will run (and clear the flag).

But if you are not going to use the interrupt, you won't need to use this. If you do set it to 1, and there is no interrupt registered, then the device will just reset.

Maybe you need more explanation on how ADC works.

You start a conversion by writing to bit 6 of ADCSRA. The conversion takes some time, and you can tell when it is ready by polling bit 4, if you don't want to use the interrupt. When it becomes 1, read the result from ADCL and ADCH. Make sure to clear the flag by writing a 1 to bit 4.

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UncleO
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  • Thank you so much! :) The brackets were the problem, now I know why bits of the code would randomly interfere with the rest. I will probably end up with soft interrupts to avoid masking between quite a lot of ISRs, so I might have to remember to set/clear important bits manually. Again, thank you so much for the help :) – MechaPrime Dec 10 '12 at 11:06