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T Flip Flop
D flip flop
D latch

I need to build a T and JK flip flop. I am able to create the d latch and d flip flop which both seem to work correctly. However, after I try to add the nor gate to create a T Flip Flop it doesn't produce any results on the vector waveform. Same thing happens when I try to make the JK FF from the D flip flop.

Bart
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user1647008
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  • Show us the waveforms... Also might get a better response on electronics.se? – Martin Thompson Nov 20 '12 at 09:07
  • "However, after I try to add the nor gate to create a T Flip Flop it doesn't produce any results" ... the schematic shows an xor gate, so which did you use in the VHDL code? –  Nov 20 '12 at 09:34
  • For jk flip flop, I think this page may be helpful.[VHDL code for JK flip flop](http://downloadsourcecodes.com/vhdl/vhdl-code-for-jk-flip-flop) –  Dec 09 '12 at 11:05
  • What do you mean, you need to "build" a flipflop? Do you mean you want to describe it in VHDL? VHDL is usually used for describing hardware at a higher level, not in terms of gates or flipflops. – Philippe Dec 10 '12 at 16:30

1 Answers1

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You do not specify how you try to build them so it's hard to guess the exact problem.

A T-FF implemented in VHDL with std_logic would need a reset to get out of the initial 'U' in the storage element. This 'U' is fed back through the XOR and keeps the FF in 'U' with no way to remove it.

If that is your problem, add a reset input.

PeterS
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