Makefile ifeq: when are they evaluated?

Question

The following is a very simple makefile that does not seem to work properly.

TEST=ON

buildbegin:
ifeq ($(TEST),ON)        
    @echo TEST PASSED
else
    @echo TEST FAILED
endif

No matter what I set the TEST variable to, my ifeq statement passes. I always see TEST PASSED. Anyone see what I am doing wrong here?

EDIT:

ok. my example was not exactly accurate. What I actually have is this:

SHELL = /bin/sh

DEFAULT_TARGS:= all  all_debug  
DEBUG_TARGS:= all_debug
ALL_TARGS:= $(DEFAULT_TARGS) $(DEBUG_TARGS)

.PHONY: $(ALL_TARGS)
.PHONY: buildbegin

$(ALL_TARGS): buildbegin

TEST=ON

$(DEBUG_TARGS): TEST=OFF

buildbegin:
    @echo $(TEST)
ifeq ($(TEST),ON)
    @echo PASSED
else
    @echo FAILED
endif

Running either make all or make all_debug will result in "PASSED" being printed. If I echo $(TEST) before the condition, it looks as if my rules are changing the variable, but the ifeq only ever sees whatever the default value is.

sorry. My example was flawed. I posted an edit with a real example — kalden, Aug 16 '12 at 19:49

score 51 · Accepted Answer · edited Jul 27 '23 at 08:26

51

make evaluates conditionals when it reads a makefile (as you know it uses 2 passes), see: Conditional Parts of Makefiles. You can simply check this by using warning (which is good thing to debug makefiles):

buildbegin:
    @echo $(TEST)
$(warning now we reached ifeq TEST=$(TEST))
ifeq ($(TEST),ON)
    @echo PASSED
else
    @echo FAILED
endif

You should use shell commands instead and include them in rule:

buildbegin:
      @if [ "$(TEST)" = "ON" ]; then echo "PASSED"; else echo "FAILED"; fi

edited Jul 27 '23 at 08:26

Sam

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answered Aug 16 '12 at 19:58

pmod

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@user1604180 Welcome to SO! If this answer is the right one (and definitely, it is), you should [accept](http://stackoverflow.com/faq#howtoask) it. – Eldar Abusalimov Aug 16 '12 at 23:28
1

@kralyk thanks for pointing at this, it should be $(TEST) actually in this case, because we want this to be evaluated by make. But if you need evaluation within shell (not in this example), then yes - you should use $$TEST. But note that every line is executed in own shell process, so in this case you need to evaluate "within one make line before testing" – pmod Dec 02 '16 at 10:10

score 4 · Answer 2 · answered Aug 16 '12 at 21:03

4

Here's a cleaner (I think, anyway) way to do what you want:

all:
    $(MAKE) TEST=ON buildbegin

all_debug:
    $(MAKE) TEST=OFF buildbegin

buildbegin:
    @echo $(TEST)
ifeq ($(TEST),ON)
    @echo PASSED
else
    @echo FAILED
endif

answered Aug 16 '12 at 21:03

twalberg

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@pmod Sub-make inherits the environment of the parent Make, so there is no need to replicate variables explicitly. – Eldar Abusalimov Aug 17 '12 at 09:04

score 2 · Answer 3 · answered Aug 24 '12 at 13:30

Parameterise the shell command using make variables. This avoids recursive make and even the shell (make will fork the command directly and not go via a shell if the command contains no shell metacharacters (<>"&; and the like)).

Something like:

result<ON> := PASSED
result<OFF> := FAILED

buildbegin:
    @echo ${result-<${TEST}>}

The <...> is simply a convention to indicate some sort of indirection.

score 1 · Answer 4 · answered May 02 '18 at 10:22

Although the question is old, I want to share a simpler way.

It is to use MAKECMDGOALSvariable that represents the list of targets.

In your case, a solution maybe:

buildbegin:
    @echo $(MAKECMDGOALS)
ifeq ($(MAKECMDGOALS),all)
    @echo PASSED
else ifeq ($(MAKECMDGOALS),debug_all)
    @echo FAILED
endif


debug_all: buildbegin

all: buildbegin

Usage: make debug_all or make all

Makefile ifeq: when are they evaluated?

4 Answers4