make error (Windows) : line 1: syntax error near unexpected token `,'

Question

I'm a starter at this(make), and having some problems trying to grep for a text in a file (as part of the make process on Windows). The larger problem I'm trying to solve is to check whether all binary executables in a given directory have their respective dependencies satisfied. I use depends.exe (Dependency Walker) for the later part, whose output file I'm trying to grep, and possibly abort the build process if the dependency validation fails.

binary-dependency-validate:
for BINARYEXEC in $(shell $(PATH_TO_FIND_EXE) $(PRE_DEFINED_DIR) -name "*.exe"); do \
   $(PATH_TO_DEPENDS_EXE) /c /pb /ot $(PRE_DEFINED_DIR)/$$BINARYEXEC-depends.txt $(PRE_DEFINED_DIR)/$$BINARYEXEC ; \
   ifeq ($(shell $(PATH_TO_GREP_EXE) "Error: At least one required implicit or forwarded dependency was not found." $(PRE_DEFINED_DIR)/$$BINARYEXEC-depends.txt),); \
      @echo "Dependency ok" ; \
   endif ; \
done

I'm encountering the following error :

line 1: syntax error near unexpected token `,'

Any suggestions would greatly help. I looked at this post and tried aligning ifeq without indentation as well (that didn't help either.)

score 1 · Accepted Answer · answered Aug 13 '12 at 14:19

1

The problem is that you are mixing Make language with shell language.

A makefile contains rules, and a rule contains commands which are executed by a shell:

target:
    first command
    second command

The commands are in shell language, and each command must be preceded by a TAB.

There are conditionals in Make:

ifeq (foo, bar)
  VAR = something      
endif

(The indentation is just for the eye.)

There are also conditionals in the various scripting languages:

if [ -f log ]
  then
    echo "log exists."
fi

A Make conditional can enclose a command within a rule:

target:
ifeq (foo, bar)
    first command
endif
    second command

Make will evaluate this conditional before running the rule, and there must be no TAB before ifeq or endif, because Make must not interpret them as commands to be passed to the shell.

A command (in a rule) can contain a shell conditional:

target:
    if [ -f log ]; \
  then echo "log exists." ; \
  fi

The indentation before if is a TAB. The other whitespace is for the eye.

Your makefile has a Make conditional in the middle of a shell command; Make can't evaluate the conditional before the command executes, and the shell can't understand Make syntax. You should use a shell conditional.

answered Aug 13 '12 at 14:19

Beta

96,650
16
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Thanks, Beta (for the detailed explanation too). I had this problem fixed when I used shell conditional instead. But I have one another problem lingering. When I run make, 'grep' command commences always before the target, and hence $$BINARYEXEC is empty when grep is run. Even though the for loop iterates through fine, grep is never recomputed per iteration.And the error gotten is : "grep: /-depends.txt: No such file or directory". I must be missing some subtle thing about how make processes these commands. Any pointers would be great. – amar.raghu Aug 14 '12 at 23:34
By pure experimentation, I'm seeing that anything that is marked to be run in a shell is being processed(and executed) ahead of the rest of the commands. Hence, I changed $(shell $(PATH_TO_GREP) ...) to just $(PATH_TO_GREP) ...., pulled it all out of the if condition and now my shell conditional that follows looks like this : if [[ $$? -eq 0 ]]. And this has worked for me. Thanks. – amar.raghu Aug 15 '12 at 00:23
@durden83, again you were putting Make language (`$(shell ...)`) inside a command. – Beta Aug 15 '12 at 01:07
:I agree, I was just encouraged initially by looking other parts of the code (where it happened to work). I realized this and removed the Make language part from the command. Thanks for the explanation, though - it helped much. – amar.raghu Aug 15 '12 at 01:11

score 0 · Answer 2 · answered Aug 12 '12 at 05:24

0

It seems like you have a stray comma on the ifeq line

binary-dependency-validate:
for BINARYEXEC in $(shell $(PATH_TO_FIND_EXE) $(PRE_DEFINED_DIR) -name "*.exe"); do \
   $(PATH_TO_DEPENDS_EXE) /c /pb /ot $(PRE_DEFINED_DIR)/$$BINARYEXEC-depends.txt $(PRE_DEFINED_DIR)/$$BINARYEXEC ; \
   ifeq ($(shell $(PATH_TO_GREP_EXE) "Error: At least one required implicit or forwarded dependency was not found." $(PRE_DEFINED_DIR)/$$BINARYEXEC-depends.txt)); \
      @echo "Dependency ok" ; \
   endif ; \
done

answered Aug 12 '12 at 05:24

Chris McKnight

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4
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GNU make suggests the syntax to be correct. i.e. ifeq(arg1,). Source : http://www.chemie.fu-berlin.de/chemnet/use/info/make/make_7.html (removed it and it didn't fix the problem nevertheless). – amar.raghu Aug 12 '12 at 06:52

make error (Windows) : line 1: syntax error near unexpected token `,'

2 Answers2