How to do a conditional statement in makefile

Question

I'm trying to use a commandline var to choose the toolkit we use to compile. When in command line I use a line like:

make all-arm OUR_TOOLKIT=1

And, in every makefile implied, i put this include

include ARM_Compiler.inc

Then, in every makefile,

all: setToolkit $(otherOperations)

And the contents of ARM_Compiler are the logic to choose the compiler:

setToolkit: 
ifdef OUR_TOOLKIT
    TOOLKIT=1
endif
ifdef CUSTOMER_TOOLKIT
    TOOLKIT=2
endif

ifeq ($(TOOLKIT), 1)
    $(info "=========Our toolkit selected======================")
    rm=/bin/rm -f
    CC= arm-linux-c++ -fPIC
    CXX= arm-linux-c++ -fPIC
    LINK= arm-linux-c++ -shared -Wl
    AR= ar cq
    RANLIB= ranlib
    STRIP=arm-linux-strip 

    # para que se utilicen las herramientas y librerias del cross compiler
    PATH:=$(PATH):/path/to/our/toolkit
    LD_LIBRAY_PATH:=$(LD_LIBRAY_PATH):/path/to/our/toolkit          
endif

ifeq ($(TOOLKIT), 2)
    $(info "================Customer toolkit selected====================")
    rm=/bin/rm -f
    CC= arm-none-linux-gnueabi-c++ -fPIC
    CXX= arm-none-linux-gnueabi-c++ -fPIC
    LINK= arm-none-linux-gnueabi-c++ -shared -Wl
    AR= ar cq
    RANLIB= ranlib
    STRIP= arm-none-linux-gnueabi-strip 

    # para que se utilicen las herramientas y librerias del cross compiler
    PATH:=$(PATH):/path/to/other/toolkit
    LD_LIBRAY_PATH:=$(LD_LIBRAY_PATH):/path/to/other/toolkit
endif

Thanks to the help of 0A0D, I discovered that TOOLKIT value is always empty. I've changed the code a little. Now the problem is that make throws the error

../makefile-includes/ARM-compiler.inc:10: *** commands commence before first target

at this line:

ifeq ($(TOOLKIT), 1)

Anyone has some idea? Thanks

similar: http://stackoverflow.com/questions/8811526/using-conditional-rules-in-a-makefile — , Jun 04 '12 at 15:28

score 10 · Accepted Answer · edited Sep 15 '14 at 16:48

Variants of this question come up a lot.

Each command executes in its own subshell; a variable set in one command cannot be used in another.

But you can set variables outside the rules: just remove all of the leading TABs from your conditional statements above. This will work for everything except PATH and LD_LIBRARY_PATH. Neither of these is, in my opinion, something that Make should mess with, but there are ways to get the effect you want. You could handle PATH like this:

ifeq ($(TOOLKIT), 1)
  TOOLKITPATH = /path/to/our/toolkit
endif
...

sometarget:
    $(TOOLKITPATH)/sometool somearg

Or like this:

all:
    export PATH=$$PATH:$(TOOLKITPATH) ; $(MAKE) $(otherOperations)

And you probably shouldn't use LD_LIBRARY_PATH at all.

How to do a conditional statement in makefile

1 Answers1