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Let's focus on uniprocessor computer systems. When a process gets created, as far as I know, the page table gets set up which maps the virtual addresses to the physical memory address space. Each process gets its own page table, stored in the kernel address space. But how does the MMU choose the right page table for the process since there is not only one process running and there will be many context switches happening?

Any help is appreciated!

Best, Simon

saimn
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2 Answers2

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Processors have a privileged register called the page table base register (PTBR), on x86 it is CR3. On a context switch, the OS changes the value of the PTBR so that the processor now knows which page table to use. In addition to the PTBR, many modern processors have a notion of an address space number (ASN). Processes are given an address space number (from a limited pool) and this ASN is set in a register on a context switch as well. This ASN is used as part of TLB matching and allows TLB entries from multiple address spaces to coexist. Only when an ASN is reused is it necessary to flush the TLB, and then only for entries matching that ASN. Most x86 implementations are more coarse grained than this and there is a notion of global pages (for shared libraries and shared data).

Nathan Binkert
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The MMU in this case is unaware completely of what a process is. The operating system, which keeps tracks of processes, generates a page table for each process, as you say, as they are created. The process for context switching is as follows:

  1. The operating system tells the MMU to use page table located at physical address 0xFOO

  2. The operating system programs the programmable interrupt timer (PIT) to cause a hardware interrupt after BAR milliseconds.

  3. The operating system restores the process state (CPU registers, program counter, etc) and jumps to the correct address.

  4. The process runs until the PIT triggers an interrupt.

  5. The Operating System routine for handling the PIT interrupt then saves the program state (registers etc), uses a scheduling algorithm for determining the next process to run (in a simple case, a circular linked list), then starts over at step 1.

I hope that clears up any doubts you may have. The short answer: The MMU is process agnostic and doesn't know what a process is.

Dougvj
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  • Thank you for your quick reply. So you say that the OS does flush & restore the page table on each context switch? – saimn Jun 04 '12 at 12:12
  • @user1435023 Essentially. The operating system tells the MMU where the table is located in physical memory as a pointer, then the MMU handles the flushing of the TTL and other hardware tasks. Depending on the MMU, the operating system may have more fine grained control of the low level details, but this is not strictly necessary. At the simplest level, all the OS cares about is telling the MMU which page table to use. – Dougvj Jun 04 '12 at 12:28
  • @user1435023 Correction: Meant TLB above, *not* TTL. Nathan Binkert answered more on the TLB aspect of things – Dougvj Jun 05 '12 at 09:52